Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device, comprising:

• forming a lower wiring layer over a semiconductor substrate with an insulation film interposed therebetween, an element being formed on the semiconductor substrate;
• forming a low dielectric constant insulation film having a relative dielectric constant of 3 or lower on said lower wiring layer;
• forming a via hole in said low dielectric constant insulation film;
• forming a high Young's modulus insulation film having a Young's modulus of 15 GPa or higher on a sidewall of said via hole;
• forming a wiring groove in said low dielectric constant insulation film with said via hole on the sidewall of which the high Young's modulus insulation film is formed;
• depositing a barrier metal and a conductive material in sequence on a surface of said low dielectric constant insulation film in which said via hole and said wiring groove are formed, such that said barrier metal and said conductive material are electrically connected to said lower wiring layer;
• and
• removing said barrier metal and said conductive material deposited outside said via hole and said wiring groove to form a plug and an upper wiring layer each having a barrier metal layer on a surface thereof in said via hole and the wiring groove, respectively.

A method for manufacturing a semiconductor device, comprising:

• forming a lower wiring layer over a semiconductor substrate with an insulation film interposed therebetween, an element being formed on said semiconductor substrate;
• forming a low dielectric constant insulation film having a relative dielectric constant of 3 or lower on said lower wiring layer;
• forming a via hole and a wiring groove in said low dielectric constant insulation film;
• forming a high Young's modulus insulation film on a surface of the low dielectric constant insulation film in which said via hole and said wiring groove are formed, said high Young's modulus insulation film having a Young's modulus of 15 GPa or higher and including a metal oxide containing at least one metal selected from a group consisting of Ta, Ti, Nb and Al;
• depositing a conductive material on a surface of said low dielectric constant insulation film in which said high Young's modulus insulation film is formed, such that the conductive material is electrically connected to said lower wiring layer;
• and
• removing said conductive material deposited outside said via hole and said wiring groove to form a plug and an upper wiring layer in said via hole and said wiring groove, respectively.