Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering
AssigneeIntel Corporation
InventorsBrian Roberds, Doulgas W. Barlage
Life of this patent
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Abstract
The invention relates to a transistor that includes a semiconductive layer on an insulator layer. Below the insulator layer is a substrate and a contact is disposed in the insulator layer that originates at the substrate and terminates in the insulator layer. The contact is aligned below the transistor junction. The invention also relates to a process flow that is used to fabricate the transistor. The process flow includes forming the contact by either a spacer etch or a directional, angular etch.
Claims37
A process of forming a transistor comprising:
- forming a gate stack including a first spacer on a semiconductive layer;
- by a gate stack self-aligned etch, first etching through the semiconductive layer;
- forming a second spacer at the gate stack;
- second etching through an insulator layer disposed beneath the semiconductive layer to form an undercut beneath the second spacer;
- and
- forming a contact at the undercut.
An article, comprising:
- a semiconductive layer disposed above a substrate;
- a gate stack disposed on the semiconductive layer;
- and
- a contact that extends at one end from the substrate and terminates at the other end in an insulator.
A method of reducing drain-induced barrier lowering, comprising:
- operating a transistor, wherein the transistor includes a contact disposed below a source/drain junction in a substrate, and wherein the contact extends at one end from the substrate and that terminates at the other end in an insulator.
A process of forming a transistor comprising:
- on a semiconductive layer of a substrate, forming a gate stack including a spacer;
- by a gate stack self-aligned etch, forming a recess through the semiconductive layer and through an insulator layer below the semiconductive layer;
- forming an inside contact in the recess that is self-aligned along one side thereof with the first spacer;
- and
- forming an outside contact in the recess that is spaced apart and opposite the inside contact.
An article, comprising:
- a semiconductive layer disposed above a substrate;
- a gate stack disposed on the semiconductive layer;
- a first contact that extends at one end from the substrate and the terminates at the other end in an insulator;
- and
- a second contact that extends at one end from the substrate and the terminates at the other end in the insulator and that is spaced apart from the first contact.
A process of forming a transistor comprising:
- on a semiconductive layer of a substrate, forming a gate stack including a spacer;
- by a gate stack self-aligned etch, forming a recess through the semiconductive layer and through an insulator layer below the semiconductive layer;
- forming an inside contact in the recess that is self-aligned along one side with the first spacer;
- forming an outside contact in the recess that is spaced apart and opposite the inside contact;
- filling the recess with a dielectric material;
- and
- patterning the dielectric material to form a channel that opens to the semiconductive substrate.
An article, comprising:
- a silicon-on-insulator (SOI) substrate including a semiconductive layer and a semiconductive substrate that are separated by the insulator;
- a gate stack disposed on the semiconductive layer;
- a first contact that extends at one end from the semiconductive substrate and the terminates in the insulator;
- and
- an epitaxial growth that extends from the semiconductor layer to the semiconductive substrate.
Dependencies are inferred from the claim text.