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US 2003/0116804 A1Published application
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
AssigneeTexas Instruments Incorporated
InventorsMark Robert Visokay, Antonio Luis Pacheco Rotondaro, Luigi Colombo
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Abstract
Methods are disclosed for forming gate dielectrics for MOSFET transistors, wherein a bilayer deposition of a nitride layer and an oxide layer are used to form a gate dielectric stack. The nitride layer is formed on the substrate to prevent oxidation of the substrate material during deposition of the oxide layer, thereby avoiding or mitigating formation of low-k interfacial layer.
Claims22
A method of fabricating a MOSFET gate dielectric structure in a semiconductor device, comprising:
- forming a nitride layer on an upper surface of a semiconductor substrate, the nitride layer substantially overlying a channel region of the substrate;
- forming an oxide layer over the nitride layer;
- and
- patterning the oxide and nitride layers to form a gate dielectric structure.
1 more element
A method of forming a MOSFET gate dielectric, comprising:
- forming a nitride layer on an upper surface of a semiconductor substrate;
- and
- forming an oxide layer over the nitride layer.
A MOSFET transistor, comprising:
- a source and a drain formed in a semiconductor substrate;
- and
- a gate structure formed by the process comprising:
- forming a nitride layer on an upper surface of the substrate, the nitride layer substantially overlying a channel region of the substrate;
- forming an oxide layer over the nitride layer;
- forming a conductive gate layer over the oxide layer;
- and
- patterning the oxide, nitride, and conductive gate layers to form a gate structure.
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Dependencies are inferred from the claim text.