Cylinder type transistor with vertical silicon-on-insulator structure and fabrication method thereof

A method for fabricating a cylinder type transistor, the method comprising steps of:

• forming a well zone of a first conductive type on a silicon substrate;
• forming a drain of a second conductive type at a predetermined depth of the well zone and forming a source above the well zone away from the drain in a vertical direction;
• forming a cylindrical trench by etching the source and the well zone in sequence to expose the drain, using a transistor mask with a circular exposure area;
• forming a gate oxide layer on an inner surface of the trench and forming a gate inside the trench;
• forming a cylindrical silicon bulk, the inside of which is filled with the gate oxide layer and the gate and the outer wall of which is exposed, by etching the source and the well zone in sequence to expose the drain using an isolation mask, the diameter of a circular shield area of the isolation mask being greater than that of the circular exposure area of the transistor mask;
• depositing an isolation oxide layer on an entire surface of a resultant to expose a portion of the gate, the source and the drain;
• and
• forming contact plugs electrically connected to the drain, the source and the drain, respectively, exposed through the isolation oxide layer.