Semiconductor memory and method for fabricating the same

A semiconductor memory comprising:

• a control gate electrode formed over a first active region of a semiconductor substrate with a control gate insulating film interposed between the first active region and the control gate electrode;
• a floating gate electrode formed adjacent to a side face of the control gate electrode and over the first active region, a capacitive insulating film being interposed between the side face of the control gate electrode and the floating gate electrode, a tunnel insulating film being interposed between the first active region and the floating gate electrode;
• first source/drain regions defined in parts of the first active region beside the control and floating gate electrodes, respectively;
• a gate electrode formed over a second active region of the substrate with a gate insulating film interposed between the second active region and the gate electrode, the second active region being electrically isolated from the first active region;
• and
• second source/drain regions defined in respective parts of the second active region beside the gate electrode,
• wherein only the first and second source/drain regions and the gate electrode have their upper surface covered with a metal silicide film.

A method for fabricating a semiconductor memory, comprising the steps of:

• a) partitioning the principal surface of a semiconductor substrate into first and second active regions by forming an isolation film in the principal surface;
• b) forming a first insulating film and a first conductor film in this order over the first and second active regions;
• c) selectively etching away parts of the first conductor and first insulating films, which have been located over the first active region, thereby forming a control gate insulating film and a control gate electrode out of the first insulating and first conductor films, respectively, over the first active region;
• d) forming a second insulating film and a second conductor film in this order over the first active region as well as over the control gate electrode;
• e) etching back the second insulating and second conductor films, thereby forming a floating gate electrode out of the second conductor film adjacently to a side face of the control gate electrode so that the second insulating film is interposed between the side face of the control gate electrode and the floating gate electrode;
• f) selectively etching away parts of the first conductor and first insulating films, which have been located over the second active region, thereby forming a gate insulating film and a gate electrode out of the first insulating and first conductor films, respectively, over the second active region;
• g) defining first source/drain regions in parts of the first active region beside the control and floating gate electrodes, respectively;
• h) defining second source/drain regions in respective parts of the second active region beside the gate electrode;
• and
• i) depositing a passivation film over the first active region and then siliciding the respective upper surfaces of the second source/drain regions and the gate electrode using the passivation film as a mask.

A method for fabricating a semiconductor memory, comprising the steps of:

• a) partitioning the principal surface of a semiconductor substrate into first and second active regions by forming an isolation film in the principal surface;
• b) forming a first insulating film and a first conductor film in this order over the first and second active regions;
• c) selectively etching away parts of the first conductor and first insulating films, which have been located over the first active region, thereby forming a control gate insulating film and a control gate electrode out of the first insulating and first conductor films, respectively, over the first active region;
• d) forming a second insulating film and a second conductor film in this order over the first active region as well as over the control gate electrode;
• e) etching back the second insulating and second conductor films, thereby forming a floating gate electrode out of the second conductor film adjacently to a side face of the control gate electrode so that the second insulating film is interposed between the side face of the control gate electrode and the floating gate electrode;
• f) selectively etching away parts of the first conductor and first insulating films, which have been located over the second active region, thereby forming a gate insulating film and a gate electrode out of the first insulating and first conductor films, respectively, over the second active region;
• g) defining first source/drain regions in parts of the first active region beside the control and floating gate electrodes, respectively;
• h) defining second source/drain regions in respective parts of the second active region beside the gate electrode;
• and
• i) depositing a passivation film over the control and floating gate electrodes and then siliciding the respective upper surfaces of the first and second source/drain regions and the gate electrode using the passivation film as a mask.