Thin film transistor substrate and liquid crystal display

A thin-film transistor substrate, comprising:

• a substrate having an insulating surface;
• gate electrodes made of a conductive material layer formed on said substrate;
• lower electrodes of capacitors made of a same material layer as said gate electrode and formed on said substrate;
• a first insulating layer formed on said substrate and covering said gate electrodes and said lower electrodes of the capacitors;
• a channel layer of high resistivity semiconductor having a concave part on a surface above each of said gate electrodes and formed on said first insulating layer over each of said gate electrodes;
• a lower layer of an upper electrode of the capacitor having no concave part on a surface, made of a same material layer as said channel layer, and formed on said first insulating layer above each of said lower electrodes of the capacitors;
• a pair of low resistivity source/drain electrodes formed on regions on both sides of each of said concave parts of said channel layers;
• an upper layer of the upper electrode of the capacitor made of a same material layer as said source/drain electrodes and formed on said lower layer of each of the upper electrodes of the capacitors;
• a second insulating layer formed on said first insulating layer and covering said source/drain electrodes and said upper layer of the upper electrode of the capacitor;
• a first connection hole penetrating said second insulating layer and exposing one of each of said pair of the source/drain electrodes;
• a second connection hole penetrating said second insulating layer and exposing a connection region of each of said upper layers of the upper electrode of the capacitor;
• and
• a pixel electrode formed on said second insulating layer and connected to said one of the source/drain electrodes and said upper layer of the upper electrode of the capacitor via said first connection hole and said second connection hole.

A liquid crystal display, comprising:

• a thin-film transistor substrate comprising a substrate having an insulating surface, gate electrodes made of a conductive material layer formed on said substrate, lower electrodes of capacitors made of a same material layer as said gate electrode and formed on said substrate, a first insulating layer formed on said substrate and covering said gate electrodes and said lower electrodes of the capacitors, a channel layer of high resistivity semiconductor formed on said first insulating layer over each said gate electrode, a lower layer of each upper electrode of the capacitors made of a same material layer as said channel layer and formed on said first insulating layer above said lower electrodes of the capacitor, a channel protection layer formed on an intermediate part of each said channel layer, a capacitor protection layer made of a same material layer as said channel protection layer and formed on a connection region of each said lower layer of the upper electrode of the capacitor, a pair of n+-type source/drain electrodes formed on each said channel layer, the source/drain electrodes being separated from each other on said channel protection layer, an upper layer of the upper electrode of the capacitor made of a same material layer as said source/drain electrodes, formed on each said lower layer of the upper electrode of the capacitor, and covering said capacitor protection layer, a second insulating layer formed on said first insulating layer and covering said source/drain electrodes and said upper layers of the upper electrode of the capacitor, a first connection hole penetrating said second insulating layer and exposing each one of said pair of the source/drain electrodes, a second connection hole penetrating said second insulating layer and exposing a connection region of each of said upper layers of the upper electrode of the capacitor, and a pixel electrode formed on said second insulating layer and connected to each one of said source/drain electrodes and said upper layer of the upper electrode of the capacitor via said first connection hole and said second connection hole;
• a color filter substrate wherein a color filter and a transparent common electrode are formed on a transparent substrate;
• and
• a liquid crystal layer held between said thin-film transistor substrate and said color filter substrate.

A liquid crystal display, comprising:

• a thin-film transistor substrate comprising a substrate having an insulating surface, gate electrodes made of a conductive material layer formed on said substrate, lower electrodes of capacitors made of a same material layer as said gate electrode and formed on said substrate, a first insulating layer formed on said substrate and covering said gate electrodes and said lower electrodes of the capacitors, a channel layer of high resistivity semiconductor having a concave part on a surface above each of said gate electrodes and formed on said first insulating layer over each of said gate electrodes, a lower layer of an upper electrode of the capacitor having no concave part on a surface, made of a same material layer as said channel layer, and formed on said first insulating layer above each of said lower electrodes of the capacitors, a pair of low resistivity source/drain electrodes formed on regions on both sides of each of said concave parts of said channel layers, an upper layer of the upper electrode of the capacitor made of a same material layer as said source/drain electrodes and formed on said lower layer of each of the upper electrodes of the capacitors, a second insulating layer formed on said first insulating layer and covering said source/drain electrodes and said upper layer of the upper electrode of the capacitor, a first connection hole penetrating said second insulating layer and exposing one of each of said pair of the source/drain electrodes, a second connection hole penetrating said second insulating layer and exposing a connection region of each of said upper layers of the upper electrode of the capacitor;
• and a pixel electrode formed on said second insulating layer and connected to said one of the source/drain electrodes and said upper layer of the upper electrode of the capacitor via said first connection hole and said second connection hole;
• a color filter substrate wherein a color filter and a transparent common electrode are formed on a transparent substrate;
• and
• a liquid crystal layer held between said thin-film transistor substrate and said color filter substrate.

A method for manufacturing a thin-film transistor substrate, comprising the steps of:

• (a) forming gate electrodes and lower electrodes of capacitors on a substrate by depositing and patterning a conductive material layer;
• (b) depositing a first insulating layer on said substrate to cover said gate electrodes and said lower electrodes of the capacitors;
• (c) depositing a high resistivity semiconductor layer on said first insulating layer, and depositing thereon an etching stopper layer;
• (d) selectively etching said etching stopper layer to remain a channel protection layer on an intermediate part of a channel region of said high resistivity semiconductor layer above each said gate electrode, and to remain a capacitor protection layer on a connection region of said high resistivity semiconductor layer above each of said lower electrodes of the capacitors;
• (e) depositing a low resistivity semiconductor layer on said high resistivity semiconductor layer to cover said channel protection layer and said capacitor protection layer, and depositing thereon a metal layer;
• (f) selectively etching said channel protection layer, said capacitor protection layer and said high resistivity semiconductor layer to form a channel layer of the high resistivity semiconductor layer, thereon a pair of source/drain electrodes of low resistivity separated from each other on said channel protection layer, a lower layer of the upper electrode of the capacitor, and an upper layer of the upper electrode of the capacitor, on said lower layer of the upper electrode of the capacitor, covering said capacitor protection layer;
• (g) forming a second insulating layer on said first insulating layer to cover said source/drain electrodes and said upper layer of the upper electrode of the capacitor;
• (h) etching a first connection hole penetrating said second insulating layer and exposing one of said pair of the source/drain electrodes and a second connection hole penetrating said second insulating layer and exposing said upper layer of the upper electrode of the capacitor;
• and
• (i) forming a pixel electrode, on said second insulating layer, connected to said one of the source/drain electrodes and said upper layer of the upper electrode of the capacitor via said first connection hole and said second connection hole.

A method for manufacturing a thin-film transistor substrate, comprising the steps of:

• (a) forming gate electrodes and lower electrodes of capacitors on a substrate by depositing and patterning a conductive material layer;
• (b) depositing a first insulating layer on said substrate to cover said gate electrodes and said lower electrodes of the capacitors;
• (c) depositing a high resistivity semiconductor layer on said first insulating layer and thereon a low resistivity semiconductor layer to form, by patterning, a channel layer and a contact layer over each said gate electrode and a lower layer of the upper electrode of the capacitor above each said lower electrode of the capacitor;
• (d) depositing a metal electrode layer, on said first insulating layer covering said contact layer and said lower layer of the upper electrode of the capacitor;
• (e) selectively etching said metal electrode layer and said high resistivity semiconductor layer on said channel layer to form a pair of source/drain electrode of low resistivity isolated from each other, and to form an upper layer of the upper electrode of the capacitor on said lower layer of the upper electrode of the capacitor;
• (f) forming a second insulating layer on said first insulating layer to cover said source/drain electrodes and said upper layer of the upper electrode of the capacitor;
• (g) etching a first connection hole penetrating said second insulating layer and exposing one of said pair of the source/drain electrodes and a second connection hole penetrating said second insulating layer and exposing said upper layer of the upper electrode of the capacitor;
• and
• (h) forming a pixel electrode, on said second insulating layer, connected to said one of the source/drain electrodes and said upper layer of the upper electrode of the capacitor via said first connection hole and said second connection hole.