Method and apparatus for bit vector array
AssigneeInternational Business Machines Corporation
InventorsPaul John Hilts, Brian Alan Youngman
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Abstract
A bit vector array apparatus provides a high speed method for processing network transmission controls. Complex data structures for controlling network access are represented in the simplest possible form as single bit vector elements. The bit vector elements are combined into bit vectors comprised of 32 single bit vector elements. The bit vectors are processed in parallel in the bit vector array apparatus, which is comprised of special-purpose bit manipulation functions to expedite the processing.
Claims12
A bit vector array apparatus for enhancing the performance of a control processor by providing special-purpose processing functions for a plurality of data structures, wherein each data structure is represented by a unique single bit referred to as a bit vector element, said bit vector array apparatus comprising:
- a processor memory means for storing instructions, data, and tables for said control processor;
- an assembly means for assembling a plurality of said bit vector elements into a composite bit vector;
- a plurality of vector registers, each vector register for temporarily storing one said bit vector;
- a plurality of combinational means, wherein each combinational means combines two or more said vector registers using logical AND/OR type functions to generate a logical vector which is derived from the said two or more vector registers;
- a plurality of bit processing functional units for performing bit-by-bit operations on said vector registers and said logical vectors;
- and
- a selection means for routing any of said vector registers or said logical vectors to said plurality of bit processing functional units.
A subscriber station for a cable TV network for communication with a headend station by downstream blocks (data traffic from said headend station to said subscriber station) and upstream blocks (data traffic from said subscriber station to said headend station), said subscriber station comprising:
- a control processor and memory for controlling said upstream communications;
- a bit vector array apparatus for enhancing the performance of said control processor by providing special-purpose processing functions for a plurality of data structures, wherein each data structure is represented by a unique single bit referred to as a bit vector element;
- an upstream slot structure having at least two types of slots, wherein a first type slot is uniquely reserved for data transfer from said subscriber station and a second type slot is used to request said first type slots and is subject to contention from other subscriber stations attached to the same network;
- and
- an upstream slot selection means under control of said control processor, wherein said control processor stores in a table in said processor memory a data structure describing the parameters of each said slot, represents each data structure with a bit vector element, performs slot selection operations in said bit vector array using the representative bit vectors, and converts said bit vector back to the corresponding data structure prior to communicating over said selected slot.
Dependencies are inferred from the claim text.