Hardware validation through binary decision diagrams including functions and equalities
AssigneeInternational Business Machines Corporation
InventorJun Sawada
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AssigneeInternational Business Machines Corporation
InventorJun Sawada
Estimating the term…
A method, computer program product, and data processing system for validating a hardware design using Binary Decision Diagrams (BDDs) containing equalities and function symbols is disclosed. A hardware design is modeled in the logic of uninterpreted functions and an expression is created that represents an equality between an expression representing a state of the modeled design and another expression representing the desired state of the design. The equality is if-lifted to produce an expression representing a BDD. An ordering relation allowing atomic terms and function symbols to be compared is established. This ordering relation is used to repeatedly and exhaustively apply a series of transformation rules to the BDD. If and only if the BDD represents a tautology (i.e., the design is correct), only a single node representing a “true” value will remain.
A method for validating a hardware design, comprising:
A computer program product in a computer-readable medium for validating a hardware design, comprising functional descriptive material that when executed by a computer, enables the computer to perform acts including:
A data processing system for validating a hardware design, comprising:
Dependencies are inferred from the claim text.