Turbo code encoder and code rate decreasing method thereof
OwnerJung-Im Kim, Seung Chan Banginventors
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Abstract
Disclosed are a turbo code encoder and a code rate decreasing method thereof. The turbo code encoder includes: a first convolutional encoder for receiving a bit to be encoded, and generating a systematic bit and a first parity bit; an interleaver for receiving the bit to be encoded, in parallel with the first convolutional encoder, and interleaving the received bit; and a second convolutional encoder for receiving the interleaved bit from the interleaver and generating a second parity bit. The code rate decreasing method of the turbo code encoder having a code rate of 1/3 includes repeatedly outputting predefined bits among the bits output from the first and second convolutional encoders.
Claims9
A turbo code encoder comprising:
- a first convolutional encoder for receiving bits to be encoded, generating a systematic bit and a first parity bit, and outputting them;
- an interleaver for receiving the bits to be encoded, in parallel with the first convolutional encoder, and interleaving the received bits;
- a second convolutional encoder for receiving the interleaved bits from the interleaver and generating a second parity bit;
- and
- a repeater for repeatedly outputting predefined bits among the bits output from the first and second convolution encoders.
A code rate decreasing method of a turbo code encoder, comprising:
- (a) receiving bits to be encoded, and generating a systematic bit and a first parity bit;
- (b) receiving the bits to be encoded, and interleaving the received bits;
- (c) receiving the interleaved bits and generating a second parity bit;
- and
- (d) repeatedly outputting predefined bits among the bits output from the steps (a) and (c).
Dependencies are inferred from the claim text.