Turbo decoding apparatus and interleave-deinterleave apparatus
AssigneeFujitsu Limited
InventorsKazuhisa Obuchi, Tetsuya Yano, Kazuo Kawabata, Takaharu Nakamura
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Abstract
In an apparatus such as a turbo decoding apparatus in which it is necessary to carry out interleave operation and deinterleave operation, there are provided a memory unit (5) and a memory control unit (12) capable of changing data writing order and data reading order with respect to the memory unit (5) depending on whether data is to be interleaved or deinterleaved. With this arrangement, the single unit of memory (5) can function as an interleaver and a deinterleaver, thereby reducing the size and cost the device.
Claims7
A turbo decoding apparatus (1) for decoding a turbo code containing at least information to be decoded (U), an error correcting code (Y1) for the information to be decoded (U) before interleave operation on a transmitting side (300), and an error correcting code (Y2) for the information which is to be decoded (U) after interleave operation on the transmitting side (300) while interleave operation and deinterleave operation repetitively carried out by using an error correcting code, characterized by comprising:
- an error correction decoding unit (4) capable of effecting error correction and decoding on the information to be decoded (U) based on either one of the error correcting codes (Y1, Y2) and a result of error correction and decoding operation which have been-done in the preceding stage;
- a memory unit (5) for effecting interleave operation and deinterleave operation on the result of error correction and decoding operation supplied from the error correction decoding unit (4), and outputting the data deriving from the error correction and decoding operation to the error correction decoding unit (4) as a result of error correction and decoding operation which have been done in the preceding stage;
- and
- a memory control unit (12) for controlling the order of writing/reading the result of error correction and decoding operation into/from the memory unit (4) so that interleave operation and deinterleave operation can be effected on the result of error correction and decoding operation depending on the error correcting code (Y1, Y2) utilized in the error correction decoding unit (4).
An interleaving-deinterleaving apparatus characterized by comprising:
- a memory unit (5) for storing therein data which is to be interleaved and deinterleaved;
- a first address generating unit (6) for generating a series of addresses in a predetermined order for the memory unit (5);
- a second address generating unit (7) for generating a series of addresses to the memory unit in an order which is different from that of the first address generating unit (6);
- an address selecting unit (8-1, 8-2) for selectively outputting one of outputs of the address generating units (6, 7) as a writing address of the memory unit (5), and outputting the other of the outputs of the address generating units as a reading address for the memory unit (5);
- and
- an address selection control unit (10) for controlling the address selecting unit (8-1, 8-2) in such a manner that the address selecting unit selects the outputs of the address generating units (6 or 7) as the writing address and the reading address depending on whether the data is to be interleaved or deinterleaved.
Dependencies are inferred from the claim text.