Deterministic preemption points in operating system execution

An apparatus for provision of a fault-tolerant system comprising:

• a primary system utilizing a primary cycle counter and an operating system capable of preemptive multi-processing;
• a secondary system utilizing a secondary cycle counter and an operating system capable of preemptive multi-processing;
• a communication link coupling the primary and secondary systems to enable inter-system communication, the primary and secondary systems agreeing on a number of instructions to execute prior to a subsequent checkpoint through the communication link, the primary and secondary systems executing instructions until one of the primary and secondary cycle counters causes a first interrupt;
• and
• an output facility to provide system output only from the secondary system if only the first interrupt has occurred and the first interrupt was caused by the secondary system.

An apparatus comprising:

• a primary system utilizing a primary cycle counter and an operating system capable of preemptive multi-processing;
• a secondary system utilizing a secondary cycle counter and an operating system capable of preemptive multi-processing;
• coupling means to enable inter-system communication between the primary and secondary systems;
• validating means to determine whether both the primary and secondary systems are equivalent in execution state;
• programming means for initializing the primary and secondary cycle counters to an agreed to number of instructions;
• interruption determining means for determining whether both a first interrupt and a second interrupt by different ones of the primary and secondary systems have occurred;
• and
• output means for providing system output only from the secondary system if only the first interrupt has occurred and the first interrupt was caused by the secondary system.

An article of manufacture comprising:

• a machine readable medium that provides instructions that, if executed by a machine, will cause the machine to perform operations including:
• providing at least two computer systems including a primary system and a secondary system, the primary and the secondary systems each utilizing processors which provide a primary cycle counter and a secondary cycle counter respectively and operating systems capable of preemptive multi-processing;
• coupling the primary and secondary systems to enable inter-system communication;
• validating that both the primary and secondary systems are equivalent in execution state;
• the primary and secondary systems agreeing on a number of instructions to execute prior to a subsequent checkpoint;
• programming the primary and secondary cycle counters to the agreed to number of instructions;
• executing instructions on both the primary and secondary systems substantially simultaneously, until one of the primary and secondary cycle counters causes a first interrupt;
• determining whether both the first interrupt and a second interrupt by a different one of the primary and secondary systems have occurred;
• and
• if only the first interrupt has occurred and the first interrupt was caused by the secondary system, providing system output only from the secondary system.