Method for depositing a low k dielectric film (k<3.5) for hard mask application
AssigneeApplied Materials, Inc.
InventorsLi-Qun Xia, Ping Xu, Louis Yang, Tzu-Fang Huang, Wen H. Zhu
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Abstract
A method for depositing a silicon oxycarbide hard mask on a low k dielectric layer is provided. Substrates containing a silicon oxycarbide hard mask on a low k dielectric layer are also disclosed. The silicon oxycarbide hard mask may be formed by a processing gas comprising a siloxane.
Claims20
A method of forming an interconnect structure on a substrate surface, comprising:
- depositing a low k dielectric layer (k<3.5) comprising a polyimide, a polytetrafluoroethylene, a parlyene, a polysilsesquioxane, a fluorinated poly(aryl ether), a fluorinated amorphous carbon, a silicon oxycarbide having a hardness of 1 giga Pascal or less, or a silicon carbide;
- depositing a low k silicon oxycarbide hard mask (k<3.5) having a hardness of greater than 1 giga Pascal over the low k dielectric layer;
- patterning the hard mask with a horizontal interconnect pattern;
- and
- transferring the horizontal interconnect pattern into the low k dielectric layer to form cavities corresponding to the horizontal interconnect pattern.
A substrate, comprising:
- a low k dielectric layer (k<3.5), comprising a polyimide, a polytetrafluoroethylene, a parylene, a polysilsesquioxane, a fluorinated poly(aryl ether), a fluorinated amorphous carbon, a silicon oxycarbide having a hardness of 1 giga Pascal or less, or a silicon carbide;
- and
- a low k silicon oxycarbide hard mask (k<3.5) having a hardness of greater than 1 giga Pascal and having a porosity of less than about 2%.
A substrate comprising a dielectric layer, an etch stop, a low k dielectric layer (k<3.5) comprising a polyimide, a polytetrafluoroethylene, a parylene, a polysilsesquioxane, a fluorinated poly(aryl ether), a fluorinated amorphous carbon, a silicon oxycarbide having a hardness of 1 giga Pascal or less, or a silicon carbide, and a low k silicon oxycarbide hard mask (k<3.5) having a hardness of greater than 1 giga Pascal and formed by a processing gas comprising a siloxane.
A substrate comprising a dielectric layer patterned with a horizontal interconnect, an etch stop over the dielectric layer that is not part of the horizontal interconnect, a low k dielectric layer (k<3.5) comprising a polyimide, a polytetrafluoroethylene, a parylene, a polysilsesquioxane, a fluorinated poly(aryl ether), a fluorinated amorphous carbon, a silicon oxycarbide having a hardness of 1 giga Pascal or less, or a silicon carbide, over the etch stop and patterned with a horizontal interconnect, and a low k silicon oxycarbide hard mask (k<3.5) having a hardness of greater than 1 giga Pascal and formed by a processing gas comprising a siloxane, over the portion of the low k dielectric layer that is not part of the horizontal interconnect.
A method of forming an interconnect structure on a substrate surface, comprising:
- depositing a dielectric layer;
- depositing an etch stop over the dielectric layer;
- depositing a low k dielectric layer (k<3.5) comprising a polyimide, a polytetrafluoroethylene, a parylene, a polysilsesquioxane, a fluorinated poly(aryl ether), a fluorinated amorphous carbon, a silicon oxycarbide having a hardness of 1 giga Pascal or less, or a silicon carbide, over the etch stop;
- and
- depositing a low k silicon oxycarbide hard mask (k<3.5) having a hardness of greater than 1 giga Pascal and formed by a processing gas comprising a siloxane.
Dependencies are inferred from the claim text.