Method of forming flash memory
AssigneeSamsung Electronics Co., Ltd.
InventorsMin-Soo Cho, Dong-Jun Kim, Jin-Woo Kim
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Abstract
The present invention provides a method of forming a split gate type flash memory. After exposure of a floating gate layer between silicon nitride layers, a conductive layer spacer is formed on a sidewall of the silicon nitride layer pattern. The conductive layer spacer is formed in a floating gate of a later-completed flash memory to form a tip on which tunneling is centralized in an erase operation. That is, the spacer is formed on a sidewall of the silicon nitride layer pattern over the floating gate layer to form the tunneling tip.
Claims11
A method of forming a split gate type flash memory device, comprising:
- forming a tunneling gate insulating layer and a first conductive layer on a substrate;
- forming an auxiliary layer pattern on the first conductive layer, the auxiliary layer including a linear gap in a first direction and having an etch selectivity with respect to the first conductive layer;
- conformally stacking and etching back a second conductive layer on a substrate including the auxiliary layer pattern to form a second conductive layer spacer on a sidewall of the auxiliary layer pattern, the second conductive layer spacer being coupled to the first conductive layer;
- conformally stacking a first insulating material layer on an entire surface of the substrate including the second conductive layer spacer, the first insulating material layer having an etch selectivity with respect to the first conductive layer and the auxiliary layer;
- and
- anisotropically etching back the first insulating material layer to form a first spacer on the sidewall of the auxiliary layer pattern, the first spacer filling a part of the linear gap and exposing the first conductive layer on the center of the linear gap.
Dependencies are inferred from the claim text.