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US 2003/0113955 A1Published application
Method for fabricating semiconductor package and semiconductor package
AssigneeLG Electronics Inc.
InventorsYong Il Kim, Sung Gue Lee, Yu Seock Yang
Life of this patent
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Abstract
A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.
Claims35
A method for fabricating a semiconductor package comprising:
- forming a plurality of patterns formed plates, wherein each pattern formed plate is formed by:
- forming first plated copper layers on upper and lower surfaces of an insulation substrate;
- forming a pattern in the first plated copper layers formed at upper and lower surfaces of the insulation substrate;
- and
- forming an opening by removing a central portion of the insulation substrate with the first plated copper pattern formed thereon;
- forming a bonding pad pattern around the opening of at least one of the pattern formed plates, and forming a first coating layer with a non-copper metal material on the bonding pad pattern;
- forming a laminated body by laminating the plurality of pattern formed plates to each other;
- forming a second plated copper layer by forming a through bore in the laminated body and forming a second copper plating on the through bore and the first coating layer;
- and
- forming a bonding pad by removing the second plated copper layer formed on the first coating layer, and forming a second coating layer with a non-copper metal material on the first coating layer.
7 more elements
A method for fabricating a semiconductor package, comprising:
- forming a plated copper pattern formed plate by:
- forming a first plated copper layer on upper and lower surfaces of a first insulation substrate;
- forming a pattern on first plated copper formed at the upper and lower surfaces of the first insulation substrate;
- and
- forming an opening by removing a central portion of the first insulation substrate with the first plated copper pattern formed thereon;
- forming an inner circuit pattern formed plate by:
- forming a second plated copper pattern on an upper surface or a lower surface of a second insulation substrate;
- forming a third plated copper layer on a second plated copper;
- and
- forming an opening by removing a central portion of the second insulation substrate with the second plated copper pattern and the third plated copper formed thereon;
- forming a lower circuit pattern formed by:
- forming a fourth plated copper pattern on an upper surface or a lower surface of a third insulation substrate;
- forming a fifth plated copper layer on the fourth plated copper;
- forming an opening by removing a central portion of the third insulation substrate with the fourth plated copper pattern and the fifth plated copper formed thereon;
- forming a bonding pad by forming a first nickel/gold plating layer around the opening of the inner circuit pattern formed plate and the lower circuit pattern formed plate;
- forming a laminated body by laminating the plated copper pattern formed plate onto the inner circuit pattern formed plate and the inner circuit pattern formed plate onto the lower circuit pattern formed plate using bonding sheets and sequentially attaching the formed plates;
- forming a through bore in the laminated body;
- forming a sixth plated copper layer on an inner circumferential surface of the through bore, the surface of the laminated body and the first nickel/gold plating layer;
- removing the sixth plated copper layer formed on the first nickel/gold plating layer of the laminated body;
- forming an outer circuit pattern by patterning a plated copper formed with the sixth plated copper layer formed thereon;
- and
- forming a second nickel/gold plating layer on the first nickel/gold plating layer of the laminated body and at a predetermined portion of the outer circuit pattern formed at an upper surface of the laminated body to form a bonding pad and a ball pad, respectively.
19 more elements
A method for fabricating a semiconductor package, comprising:
- forming a plurality of circuit patterns;
- forming a cavity in a central portion of each of the plurality of circuit patterns;
- mounting a semiconductor chip within the cavity;
- and
- forming a bonding pad circuit pattern to be connected to the semiconductor within the cavity, wherein a first coating layer is formed with a non-copper metal material at the bonding pad circuit pattern and a copper plating is formed on the first coating layer.
2 more elements
A method for fabricating a semiconductor package, comprising:
- forming a plurality of patterns formed plates, wherein each pattern formed plate is formed by:
- forming first plated copper layers on upper and lower surfaces of an insulation substrate;
- forming a pattern in the first plated copper layers formed at upper and lower surfaces of the insulation substrate;
- and
- forming an opening by removing a central portion of the insulation substrate with the first plated copper pattern formed thereon;
- forming a bonding pad pattern around the opening of at least one of the pattern formed plates;
- forming a first coating layer with a non-copper metal material on the bonding pad pattern;
- forming a laminated body by laminating the plurality of pattern formed plates to one another, wherein the openings of the plurality of patterns formed plates are aligned to form a cavity;
- forming a through bore through the laminated body;
- forming a second plated copper layer on the through bore and the first coating layer;
- removing the second plated copper layer formed on the first coating layer;
- forming a second coating layer with a non-copper metal material on the first coating layer, thereby forming a bonding pad;
- mounting a semiconductor chip in the cavity;
- connecting the semiconductor chip and the bonding pad by a connection line;
- and
- filling the cavity with a filler.
13 more elements
A method of forming a semiconductor package, comprising:
- forming a plurality of plates, wherein each plate is formed by:
- coating a first coating on a substrate;
- and
- forming an opening in a central portion of the substrate with the first coating thereon;
- forming a bonding pad pattern on at least one of the plurality of plates, wherein a second coating is coated onto the bonding pad pattern;
- forming a body by stacking the plurality of plates;
- forming a through bore in the body;
- and
- coating the through bore with a third coating.
6 more elements
A semiconductor package, comprising:
- a laminated body, comprising:
- a plurality of plates laminated into a body, wherein each plate comprises a substrate, a first coating and an opening;
- a bonding pad on at least one of the plurality of plates, wherein the bonding pad comprises a metal layer;
- and
- a through bore in the laminated body with a second coating therein;
- a heat sink attached to a lower surface of the laminated body;
- a semiconductor chip on an upper surface of the heat sink in the openings of the plurality of plates;
- and
- a connector for connecting the semiconductor chip to the laminated body, wherein the connector is connected to the bonding pad of the laminated body.
6 more elements
Dependencies are inferred from the claim text.