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US 2003/0113952 A1Published application
Underfill materials dispensed in a flip chip package by way of a through hole
OwnerMahesh Sambasivam, Vassoudevane LeBonheurinventors
Life of this patent
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Abstract
A microelectronic device and methods of fabricating the same comprising disposing an underfill material between a substrate and a flip chip by providing a hole through the substrate wherein the underfill material is injected therethrough.
Claims20
A method of fabricating a microelectronic package, comprising:
- providing a substrate having a first surface, an opposing second surface, and a plurality of lands disposed on said first surface;
- forming a through-hole extending from said substrate first surface to said substrate second surface;
- providing a microelectronic die having an active surface, a back surface, and a plurality of pads disposed on said active surface in a corresponding relationship to said plurality of substrate lands;
- electrically attaching said plurality of substrate lands to said plurality of corresponding microelectronic die pads with a plurality of conductive bumps;
- disposing an underfill material through said through-hole such that said underfill material is dispersed between said microelectronic die active surface and said substrate first surface.
2 more elements
A method of fabricating a microelectronic package, comprising:
- providing a substrate having a first surface, an opposing second surface, and a plurality of lands disposed on said first surface;
- forming a through-hole extending from said substrate first surface to said substrate second surface;
- providing a microelectronic die having an active surface, a back surface, and a plurality of pads disposed on said active surface in a corresponding relationship to said plurality of substrate lands;
- electrically attaching said plurality of substrate lands to said plurality of corresponding microelectronic die pads with a plurality of conductive bumps;
- positioning said microelectronic die and said substrate such that said microelectronic die is gravitationally below said substrate;
- and
- disposing an underfill material through said through-hole such that said underfill material is dispersed between said microelectronic die active surface and said substrate first surface.
4 more elements
A method of fabricating a microelectronic package, comprising:
- providing a substrate having a first surface, an opposing second surface, a plurality of lands disposed on said first surface, and at least one wirebond land on said first surface;
- forming a through-hole extending from said substrate first surface to said substrate second surface;
- providing a microelectronic die having an active surface, a back surface, and a plurality of pads disposed on said active surface in a corresponding relationship to said plurality of substrate lands;
- electrically attaching said plurality of substrate lands to said plurality of corresponding microelectronic die pads with a plurality of conductive bumps;
- disposing an underfill material through said through-hole such that said underfill material is dispersed between said microelectronic die active surface and said substrate first surface;
- providing a second microelectronic die having an active surface, a back surface, and at least one wirebond pad disposed on said active surface;
- attaching said second microelectronic die back surface to said microelectronic die back surface;
- and
- attaching at least one wirebond between said at least one substrate wirebond land and said second microelectronic die wirebond pad.
6 more elements
Dependencies are inferred from the claim text.