# US 2003/0113669 A1 · Method of fabricating passive device on printed circuit board

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- Number: US 2003/0113669 A1
- Document ID: US20030113669A1
- Status: Published application
- Kind: A1
- Application number: 10/033,755
- Filed: 2001-12-19
- Published: 2003-06-19
- Earliest claimed: 2001-12-19
- Inventors: Jao-Chin Cheng; Chia-Pin Lin; Ting-Liang Fang; Chang-Yun Hung
- Web page: https://patentgrep.com/patent/US20030113669A1

## CPC

- H05K 1/167: {incorporating printed resistors}
- H05K 1/162: {incorporating printed capacitors}
- H05K 1/095: {for polymer thick films, i.e. having a permanent organic polymeric binder}
- H05K 3/064: {Photoresists}
- H05K 3/423: {characterised by electroplating method}
- H05K 3/4623: {the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards (H05K3/462 takes precedence)}
- H05K 3/4647: {by applying an insulating layer around previously made via studs}
- H05K 2201/0376: Flush conductors, i.e. flush with the surface of the printed circuit
- H05K 2201/09672: Superposed layout, i.e. in different planes
- H05K 2201/09881: Coating only between conductors, i.e. flush with the conductors
- H05K 2203/0723: Electroplating, e.g. finish plating
- H05K 2203/0733: Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
- H05K 2203/1453: Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A method of fabricating a passive device on a printed circuit board. A first substrate and a second substrate are provided. Each of the first and the second substrates has an insulation core layer and a conductive layer on the insulation core layer. A dielectric layer is coated on the first substrate to cover a surface of the conductive layer thereon as an internal dielectric layer. The second substrate is laminated onto the internal dielectric layer, so that the conductive layers of the first and the second substrates are adjacent to the internal dielectric layer.

## Claims

### Claim 1

A method of fabricating a passive device on a printed circuit board, comprising:
providing a first substrate that comprises at least a first insulation core layer and a first conductive layer over the first insulation core layer;
providing a second substrate that comprises at least a second insulation core layer and a second conductive layer over the second insulation core layer;
coating a dielectric material over the first substrate to cover the first conductive layer to form an internal dielectric layer; and
laminating the second substrate with the first substrate, with the first conductive layer and the second conductive layer sandwiching and adjacent to the internal dielectric layer.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the method for coating the dielectric material includes spray coating, spin coating, screen printing or cylinder press.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the step for forming the first substrate further comprises:
providing a substrate, on which a first insulation core layer and a conductive line on the first insulation core layer are formed;
forming an interconnect to electrically connect the conductive line, wherein the interconnect has a top surface;
forming an insulation layer to cover the conductive line and the first insulation core layer, so that the insulation layer is level to the top surface of the interconnect; and
forming the first conductive layer to cover the insulation layer and to electrically connect the interconnect.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the step of forming the interconnect further comprises:
forming a patterned photoresist layer on the first insulation core layer and the conductive line, wherein the patterned photoresist layer has an opening exposing a part of the conductive line;
filling a conductive material in the opening to electrically connect the conductive line and
removing the patterned photoresist layer.

### Claim 5 (depends on 4)

The method according to claim 4, wherein the step of filling the conductive material includes spray coating, spin coating, screen printing, cylinder press or electroplating.

### Claim 6 (depends on 3)

The method according to claim 3, wherein the step of forming the insulation layer includes:
forming an insulation layer to cover the interconnect, the conductive layer and the first insulation core layer; and
removing a part of the insulation layer until it is level to the top surface of the interconnect.

### Claim 7 (depends on 6)

The method according to claim 6, wherein the step of removing a part of the insulation layer includes a polishing process.

### Claim 8 (depends on 1)

The method according to claim 1, wherein the step for forming the second substrate includes:
providing a substrate, on which the second insulation core layer and a conductive line on the second insulation core layer are formed;
forming an interconnect to electrically connect the conductive line, wherein the interconnect has a top surface;
forming an insulation layer to cover the conductive line and the second insulation core layer, so that the insulation layer is level to the top surface of the interconnect; and
forming the second conductive layer to cover the insulation layer and to electrically connect the interconnect.

### Claim 9 (depends on 8)

The method according to claim 8, wherein the step of forming the interconnect further comprises:
forming a patterned photoresist layer on the second insulation core layer and the conductive line, wherein the patterned photoresist layer has an opening exposing a part of the conductive line;
filling a conductive material in the opening to electrically connect the conductive line and
removing the patterned photoresist layer.

### Claim 10 (depends on 9)

The method according to claim 9, wherein the step of filling the conductive material includes spray coating, spin coating, screen printing, cylinder press or electroplating.

### Claim 11 (depends on 8)

The method according to claim 8, wherein the step of forming the insulation layer includes:
forming an insulation layer to cover the interconnect, the conductive line and the second insulation core layer; and
removing a part of the insulation layer until it is level to the top surface of the interconnect.

### Claim 12 (depends on 11)

The method according to claim 11, wherein the step of removing a part of the insulation layer includes a polishing step.

### Claim 13

A method of fabricating a passive device on a printed circuit board, comprising:
providing a substrate, on which a first insulation core layer and a first conductive line on the insulation core layer are formed;
forming an insulation layer to cover the insulation core layer, wherein the insulation layer is level to the first conductive line;
removing a part of the first conductive line, dividing the first conductive line to make it an open circuit; and
coating a conductive material to fill the opening as a conductive line, so that the first conductive line becomes conducted thereby, wherein the conductive material has a conductivity different from that of the first conductive line.

### Claim 14 (depends on 13)

The method according to claim 13, wherein the step of removing a part of the first conductive line further comprises:
forming a patterned photoresist layer on the insulation core layer and the first conductive line, wherein the patterned photoresist layer has an opening exposing a part of the first conductive line;
removing the exposed part of the first conductive line; and
removing the patterned photoresist layer.

### Claim 15 (depends on 13)

The method according to claim 13, wherein the step of coating the conductive material includes spray coating, spin coating, screen printing, cylinder press or electroplating.

### Claim 16 (depends on 13)

The method according to claim 13, wherein the step of forming the insulation layer includes:
forming an insulation layer to cover the first conductive line and the insulation core layer; and
removing a part of the insulation layer until it is level to the top surface of the first conductive line.

### Claim 17 (depends on 16)

The method according to claim 16, wherein the step of removing a part of the insulation layer includes a polishing process.