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US 2003/0112684 A1Published application
DRAM reference cell direct write
AssigneeInternational Business Machines Corporation
InventorJohn Barth JR.
Life of this patent
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Abstract
The improved reference cell configurations having reduced pre-charge time are obtained by configurations where the reference cell pre-charge level is generated with a voltage regulator (or other power supply) and is directly written into each reference cell. The direct write reference cell configuration improves cycle time of operation when incorporated into sense amplifier and/or DRAM devices.
Claims20
A reference cell circuit for supplying a reference voltage, said circuit comprising a first reference cell comprising:
- (a) a first storage device for storing said reference voltage,
- (b) a first power supply for supplying said reference voltage to said storage device, and
- (c) a first output node for outputting said reference voltage from said storage device,
- wherein said storage device is electrically isolated from other reference cell storage devices.
1 more element
A DRAM device comprising:
- (a) an array of DRAM memory cells,
- (b) wordlines and bitlines connected to at least some of said memory cells, and
- (c) a reference cell circuit for supplying a reference voltage, said reference cell circuit comprising a first reference cell comprising:
- (i) a first storage device for storing said reference voltage,
- (ii) a first power supply for supplying said reference voltage to said storage device, and
- (iii) a first output node for outputting said reference voltage from said storage device,
- wherein said storage device is electrically isolated from other reference cell storage devices.
4 more elements
Dependencies are inferred from the claim text.