US 2003/0112652 A1 · Semiconductor integrated circuit

Abstract

On the first digital circuit, the circuits which must be operated even under the waiting condition such as an SRAM which is required to hold control data or the like even during the waiting condition of a semiconductor integrated circuit and a timer circuit for recovery from the waiting condition and for the waiting operation are formed. A gate insulation film of the MOS transistor forming the first digital circuit is formed to be thicker than that of the MOS transistor of the second digital circuit in which the circuits which are not operated during the waiting condition are formed. Accordingly, the sub-threshold leak current of the first digital circuit to be operated even during the waiting condition and the tunnel leak current of the gate electrode can be reduced. Moreover, when the semiconductor integrated circuit of the present invention is applied to a battery power supply system, the operation life of a battery can be extended.

Claims12

Dependent claims

A semiconductor integrated circuit formed on a semiconductor substrate comprising:

an external terminal;
an interface circuit connected to said external terminal;
a first digital circuit including a first memory with a memory cell array and a peripheral circuit thereof;
and
a second digital circuit including a logic circuit,
wherein a gate insulation film of MOS transistors forming said first digital circuit is formed to be thicker than a gate insulation film of MOS transistors forming said second digital circuit.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor integrated circuit

Life of this patent

Semiconductor integrated circuit

Life of this patent

Abstract

Claims12