Video encoder and image processing system using same

An image processing system comprising:

• a video encoder for combining a color signal and a luminance signal including a frequency component of the color signal to generate a composite video signal, the video encoder having a-level adjustment circuit for adjusting the output level of the generated composite video signal based on a setting value;
• a storage circuit for storing display data and texture data required by at least one graphic element;
• and
• a logic circuit provided with at least an interpolated data generation circuit for interpolating polygon rendering data of vertexes of a unit graphic to generate interpolated data of a pixel positioned within the unit graphic and a texture processing circuit for dividing homogeneous coordinates (s, t) of texture included in the interpolated data by a homogeneous term q to generate “s/q” and “t/q”, reading the texture data from the storage circuit by using a texture address corresponding to the “s/q” and “t/q”, and performing processing to apply the texture data to a surface of a graphic element of the display data,
• the storage circuit and the logic circuit being accommodated in one semiconductor chip;
• and
• a rendering circuit receiving polygon rendering data including three-dimensional coordinates (x, y, z), R (red), G (green), and B (blue) data, homogeneous coordinates (s, t) of the texture, and the homogeneous term q for vertexes of the unit graphic, performing rendering, and outputting the result to the video encoder.