High precision, high-speed signal capture
AssigneeTeradyne, Inc.
InventorAyman A. Al-Awadhi
Life of this patent
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Abstract
A topology for converting an analog input signal at an input port into a corresponding digital output signal at an output port includes a plurality of substantially identical ADC stages. Each ADC stage includes a multi-bit sigma-delta loop having an analog input coupled to the input port and a digital output coupled to a combining circuit. The combining circuit adds the outputs of the ADC stages to generate the digital output signal.
Claims20
A topology for converting an analog input signal into a digital output signal, comprising:
- an input port for receiving the analog input signal;
- an output port for providing a digital output signal that varies in relation with the analog input signal;
- a plurality of substantially identical ADC stages, each ADC stage having an analog input and a digital output, each analog input being coupled to the input port;
- and
- a combining circuit having a plurality of inputs coupled to the digital outputs of the plurality of ADC stages, and an output coupled to the output port for producing the digital output signal,
- wherein each ADC stage comprises a multi-bit sigma-delta loop.
A method for converting an analog input signal into a corresponding digital output signal, comprising:
- providing the analog input signal to a plurality of substantially ADC stages;
- actuating each of the plurality of ADC stages to convert its respective input signal into respective output signal;
- and
- combining the respective output signals to generate the digital output signal,
- wherein each ADC stage comprises a multi-bit sigma-delta loop.
A topology for converting an analog input signal into a digital output signal, comprising:
- an input port for receiving the analog input signal;
- an output port for providing a digital output signal that varies in relation with the analog input signal;
- an inverting circuit having an input and an output, the input coupled to the input port;
- a first plurality of substantially identical ADC stages, each ADC stage having an analog input coupled to the input port, and a digital output;
- a second plurality of substantially identical ADC stages, each ADC stage having an analog input coupled to the output of the inverting circuit, and a digital output;
- and
- an adder circuit having a plurality of inputs coupled to the digital outputs of the first and second plurality of ADC stages, and an output coupled to the output port for producing the digital output signal,
- wherein each ADC stage comprises a multi-bit sigma-delta loop.
Dependencies are inferred from the claim text.