Integrated circuit with closely coupled high voltage output and offline transistor pair
AssigneePower Integrations, Inc.
InventorDonald Ray Disney
Life of this patent
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Abstract
An integrated circuit fabricated in a single silicon substrate includes a high-voltage output transistor having source and drain regions separated by a channel region, and a gate disposed over the channel region. Also included is an offline transistor having source and drain regions separated by a channel region and a gate disposed over the channel region of the offline transistor. A drain electrode is commonly coupled to the drain region of the high-voltage output transistor and to the drain region of the offline transistor.
Claims28
An integrated circuit in a substrate comprising:
- a high-voltage output transistor having source and drain regions separated by a channel region, and a gate disposed over the channel region;
- an offline transistor having source and drain regions separated by a channel region and a gate disposed over the channel region of the offline transistor;
- a drain electrode commonly coupled to the drain region of the high-voltage output transistor and the drain region of the offline transistor.
A power device comprising:
- an integrated circuit in a substrate that includes:
- a high-voltage output transistor having source and drain regions separated by a channel region, and a gate disposed over the channel region;
- an offline transistor having source and drain regions separated by a channel region and a gate disposed over the channel region of the offline transistor;
- a drain electrode commonly coupled to the drain region of the high-voltage output transistor and the drain region of the offline transistor;
- and
- a package housing the integrated circuit, the package having a first pin connected to the drain electrode.
An integrated circuit fabricated on a substrate comprising:
- a high-voltage output MOSFET having interdigitated source and drain regions separated by a channel region, and a gate disposed over the channel region;
- an offline transistor having interdigitated source and drain regions separated by a channel region and a gate disposed over the channel region of the offline transistor, the drain region of the offline transistor being disposed in a first well region and the drain region of the high-voltage transistor being disposed in a second well region, the source regions of the high-voltage output and offline transistors are disposed in a common body region of the substrate interposed between the first and second well regions;
- a drain electrode commonly coupled to the drain region of the high-voltage output transistor and the drain region of the offline transistor.
Dependencies are inferred from the claim text.