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US 2003/0112051 A1Published application
Data transfer circuit between different clock regions
AssigneeFujitsu Limited
InventorsShigetoshi Wakayama, Hiroshi Okano, Yoshio Hirose
Life of this patent
Estimating the term…
Abstract
A circuit for data transfer includes a first buffer operating at a first clock frequency, a plurality of second buffers operating at a second clock frequency, and a selector circuit which receives data at the first clock frequency, and supplies the data to a selected one of the first buffer and the second buffers.
Claims10
A circuit for data transfer, comprising:
- a first buffer operating at a first clock frequency;
- a plurality of second buffers operating at a second clock frequency;
- and
- a selector circuit which receives data at the first clock frequency, and supplies the data to a selected one of said first buffer and said second buffers.
1 more element
A circuit for data transfer, comprising:
- a plurality of buffers which receive data at a first clock frequency from respective data sources;
- and
- a selector circuit which selects one of said buffers one after another at the second clock frequency, thereby successively outputting data of the selected one of said buffers to a data destination at the second clock frequency.
Dependencies are inferred from the claim text.