Body-contacted and double gate-contacted differential logic circuit and method of operation

A method of enhancing stability of a differential logic circuit, comprising the steps of:

• providing a differential logic circuit having a plurality of transistors arranged in a first evaluate tree and a second evaluate tree, each transistor having one of a single gate with a body and a double gate, and a differential load structure having a first intermediate output node and a second intermediate output node;
• and
• biasing, in said first evaluate tree, said body of said each transistor when said each transistor has a single gate and said at least one of said double gates of said each transistor when said each transistor has a double gate with voltage present at said second intermediate node, and biasing, in said second evaluate tree, said body of said each transistor when said each transistor has a single gate and said at least one of said double gates of said each transistor when said each transistor has a double gate with voltage present at said first intermediate node.

A logic circuit, comprising:

• a plurality of evaluate transistors, each having first and second gates;
• and
• a differential load structure connected to said first gates of said plurality of transistors.