Semiconductor device and a method of manufacturing the same
AssigneeRenesas Technology Corp.
InventorsMitsuaki Katagiri, Yuji Shirai, Yoshiyuki Kado
Life of this patent
Estimating the term…
Abstract
With respect to two types of chips to be mounted on a main surface of a package substrate, the ratio of chip area to the number of terminals of one chip and that of the other chip are compared with each other and the chip smaller in the ratio is mounted by the wire bonding method, while the chip larger in the ratio is mounted by the flip-chip method. It is possible to reduce the cost of manufacturing a multi-chip module wherein plural types of chips having different terminal pitches are mounted on a wiring substrate.
Claims19
A semiconductor device comprising:
- a wiring substrate with plural wires and plural bonding pads formed on a main surface thereof;
- a first semiconductor chip mounted on the main surface of the wiring substrate and connected to the wires electrically through plural bump electrodes;
- and
- a second semiconductor chip stacked on the first semiconductor chip and connected to the bonding pads electrically through plural wires,
- wherein a terminal pitch of the second semiconductor chip is narrower than that of the first semiconductor chip.
A semiconductor device comprising:
- a wiring substrate with plural wires and plural bonding pads formed on a main surface thereof;
- a first semiconductor chip mounted on the main surface of the wiring substrate and connected to the wires electrically through plural bump electrodes;
- and
- a second semiconductor chip stacked on the first semiconductor chip and connected to the bonding pads electrically through plural wires,
- wherein a ratio of area of the second semiconductor chip to the number of terminals of the same chip is smaller than that of the second semiconductor chip.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) providing a wiring substrate with plural wires and plural bonding pads formed on a main surface thereof, a first semiconductor chip with plural bump electrodes formed on a main surface thereof, and a second semiconductor chip having a terminal pitch narrower than that of the first semiconductor chip;
- (b) placing the first semiconductor chip on the main surface of the wiring substrate so that the main surface thereof is opposed to the main surface of the wiring substrate, and connecting the first semiconductor chip and the wires on the wiring substrate with each other electrically through the plural bump electrodes;
- (c) placing the second semiconductor chip on the first semiconductor chip so that a back side thereof is opposed to the main surface of the wiring substrate, and connecting the second semiconductor chip and the bonding pads of the wiring substrate with each other electrically through plural wires;
- and
- (d) sealing the first and second semiconductor chips with resin.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) providing a wiring substrate with plural wires and plural bonding pads formed on a main surface thereof, a semiconductor chip with plural bump electrodes formed on a main surface thereof, and a second semiconductor chip having a ratio of chip area to the number of terminals smaller than that of the first semiconductor chip;
- (b) placing the first semiconductor chip in a first area of the main surface of the wiring substrate so that the main surface thereof is opposed to the main surface of the wiring substrate, and connecting the first semiconductor chip and the wires on the wiring substrate with each other electrically through the plural bump electrodes;
- and
- (c) placing the second semiconductor chip on the first semiconductor chip so that a back side thereof is opposed to the main surface of the wiring substrate, and connecting the second semiconductor chip and the bonding pads of the wiring substrate with each other electrically through plural wires.
A semiconductor device comprising:
- a wiring substrate with plural wires and plural bonding pads formed on a main surface thereof;
- a first semiconductor chip having on a main surface thereof a plurality of semiconductor elements and a plurality terminals, the first semiconductor chip being mounted on the main surface of the wiring substrate through plural bump electrodes so that the main surface thereof is opposed to the main surface of the wiring substrate;
- and
- a second semiconductor chip having on a main surface thereof a plurality of semiconductor elements and a plurality of terminals, the second semiconductor chip being mounted on the main surface of the wiring substrate so that a back side thereof opposite to the main surface thereof is opposed to the main surface of the wiring substrate, the plural terminals and plural electrode pads on the wiring substrate being connected with each other electrically through plural wires,
- wherein, given that the number of terminals of the first semiconductor chip and that of the second semiconductor chip are N1 and N2, respectively, and that the area of the main surface of the first semiconductor chip and the area of the main surface of the second semiconductor chip are S1 and S2, respectively, there is established a relation of SQRT(S1/N1)>SQRT(S2/N2).
Dependencies are inferred from the claim text.