# US 2003/0111717 A1 · Semiconductor device and method of manufacturing the same

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- Number: US 2003/0111717 A1
- Document ID: US20030111717A1
- Status: Published application
- Kind: A1
- Application number: 10/299,768
- Filed: 2002-11-20
- Published: 2003-06-19
- Earliest claimed: 2001-12-14
- Assignees: Renesas Technology Corp.; Hitachi ULSI Systems Co., Ltd.
- Inventors: Fujio Ito; Hiromicti Suzuki
- Web page: https://patentgrep.com/patent/US20030111717A1

## CPC

- H10W 70/429: {being the outer leads}
- H10W 70/04: of leadframes
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/413: {Insulating or insulated substrates serving as die pads (H10W70/468 takes precedence)}
- H10W 70/421: {Shapes or dispositions}
- H10W 70/424: {Cross-sectional shapes (H10W70/481 takes precedence)}
- H10W 70/435: {of insulating layers on leadframes, e.g. bridging members}
- H10W 70/457: {of metallic layers on leadframes}
- H10W 70/464: {Additional interconnections in combination with leadframes}
- H10W 72/90: Bond pads, in general
- H10W 74/014: {using batch processing}
- H10W 74/016: {using moulds}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/427: {Bent parts}
- H10W 70/461: {specially adapted for cooling}
- H10W 72/0198: {batch processes}
- H10W 72/07141: {Means for applying energy, e.g. ovens or lasers}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07352: {changes in structures or sizes}
- H10W 72/07353: {changes in shapes}
- H10W 72/075: {of bond wires}
- H10W 72/07504: {the auxiliary member being temporary, e.g. a sacrificial coating}
- H10W 72/07521: {Aligning}
- H10W 72/07552: {changes in structures or sizes}
- H10W 72/07554: {changes in dispositions}
- H10W 72/321: {Structures or relative sizes of die-attach connectors}
- H10W 72/332: {Plan-view shape, i.e. in top view}
- H10W 72/521: {Structures or relative sizes of bond wires}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/5366: {the bond wires having kinks}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements}
- H10W 72/547: {Dispositions of multiple bond wires}
- H10W 72/5522: {comprising gold [Au]}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/934: {Cross-sectional shape, i.e. in side view}
- H10W 72/951: {Materials of bond pads}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

As a means for promoting the increase of the number of pins in a QFN (Quad Non-leaded package), a semiconductor die mounted on a die pad is arranged at the center of a plastic package, and a plurality of leads made of the same metal as the die pad and die pad supports are arranged around the die pad so as to surround the die pad. Lead tips on one side near the semiconductor die are electrically connected to bonding pads on a main surface of the semiconductor die via gold wires, and lead tips on the other side are ended at a side surface of the plastic package. In order to reduce the length between the semiconductor die and the leads, the lead tips on the one side are extended to positions close to the die pad, and the intervals between adjoining leads on the one side are smaller than those on the other side.

## Claims

### Claim 1

A semiconductor device, comprising: a semiconductor die; a die pad on which the semiconductor die is mounted; a plurality of leads arranged around the semiconductor die; a plurality of wires for electrically connecting the semiconductor die and the leads; and a plastic package for encapsulating the semiconductor die, the die pad, the plurality of leads, and the plurality of wires,
wherein the plurality of leads are formed so that intervals between the lead tips on one side near the semiconductor die are narrower than those between the lead tips on the other side opposite to the one side, and
a terminal protruded from a rear surface of the plastic package to the outside is selectively provided to each of the plurality of leads.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the terminal is constituted of a part of the lead protruded from the rear surface of the plastic package to the outside.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein the terminal is made of a conductive material which is different from that of the lead.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein a rear surface of the die pad is exposed from the rear surface of the plastic package.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the terminals are arranged in two lines along each side of the plastic package in a zigzag pattern.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5,
wherein, of the plurality of leads, leads on which the terminals are arranged closer to the one side have a width larger than that of leads on which the terminals are arranged closer to the other side.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein an area of the die pad is smaller than that of the semiconductor die.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1,
wherein the die pad is supported by a plurality of die pad supports.

### Claim 9

A semiconductor device, comprising: a semiconductor die; a die pad support having a film shape on which the semiconductor die is mounted; a plurality of leads arranged around the semiconductor die; a plurality of wires for electrically connecting the semiconductor die and the leads; and a plastic package for encapsulating the semiconductor die, the die pad support, the plurality of leads, and the plurality of wires,
wherein the plurality of leads are formed so that intervals between the lead tips on one side near the semiconductor die are narrower than those between the lead tips on the other side opposite to the one side, and
a terminal protruded from a rear surface of the plastic package to the outside is electrically connected to each of the plurality of leads.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9,
wherein the die pad support is supported by the plurality of leads.

### Claim 11

A method of manufacturing a semiconductor device, which comprises: a semiconductor die; a die pad on which the semiconductor die is mounted; a plurality of leads arranged around the semiconductor die; a plurality of wires for electrically connecting the semiconductor die and the leads; and a plastic package for encapsulating the semiconductor die, the die pad, the plurality of leads, and the plurality of wires,
the method comprising the steps of:
(a) preparing a lead frame on which patterns including the die pad and the plurality of leads are successively formed, and a terminal protruded in a direction perpendicular to a surface of the lead is formed on each of the surfaces of the plurality of leads;
(b) mounting a semiconductor die on each of the plurality of die pads formed on the lead frame, and connecting the semiconductor die and the parts of the leads by the use of wires;
(c) preparing a molding die having an upper die and a lower die, coating a surface of the lower die with a resin film, and then, mounting the lead frame on the resin film, thereby bringing the terminal formed on the surface of the lead into contact with the resin film;
(d) pressing the resin film and the lead frame with the upper die and the lower die to push tip portions of the terminals into the resin film;
(e) injecting resin into spaces between the upper and lower dies, thereby encapsulating the semiconductor die, the die pad, the leads, and the wires, and separating the lead frame from the molding die after forming a plurality of plastic packages in which the tip portions of the terminals are protruded to the outside; and
(f) dicing the lead frame to obtain pieces of plastic packages.

### Claim 12 (depends on 11)

The method of manufacturing a semiconductor device according to claim 11,
wherein the step (a) includes the step of coating a part of a metal sheet with a photoresist film, and performing etching of parts of the metal sheet not coated with the photoresist film, thereby forming the plurality of leads, the die pad, and the terminals.

### Claim 13 (depends on 12)

The method of manufacturing a semiconductor device according to claim 12,
wherein the plurality of leads are formed by the half etching of the metal sheet.

### Claim 14 (depends on 11)

The method of manufacturing a semiconductor device according to claim 11,
wherein the plurality of leads are formed so that intervals between the lead tips on one side near the die pad are narrower than those between the lead tips on the other side opposite to the one side.

### Claim 15 (depends on 11)

The method of manufacturing a semiconductor device according to claim 11,
wherein the terminal formed in the step (a) is a dummy terminal, and, after the step (e), the method further comprises the steps of: removing the dummy terminal; and forming a terminal whose tip portion is protruded to the outside of the plastic package on a surface of the lead in the area where the dummy terminal has been removed.

### Claim 16 (depends on 12)

The method of manufacturing a semiconductor device according to claim 12,
wherein, in the etching of the metal sheet in the step (a), an area on the metal sheet where the die pad is to be formed is not etched.

### Claim 17 (depends on 12)

The method of manufacturing a semiconductor device according to claim 12,
wherein, in the etching of the metal sheet in the step (a), an area on the metal sheet which contacts to the molding die in the step (d) is not etched.

### Claim 18 (depends on 11)

The method of manufacturing a semiconductor device according to claim 11,
wherein slits are provided in an outer frame of the lead frame.

### Claim 19 (depends on 11)

The method of manufacturing a semiconductor device according to claim 11,
wherein the terminals are arranged in two lines along each side of the plastic package in a zigzag pattern.

### Claim 20 (depends on 19)

The method of manufacturing a semiconductor device according to claim 19,
wherein, of the plurality of leads, a lead on which the terminal is arranged closer to the die pad has a width larger than that of a lead on which the terminal is arranged apart from the die pad.