US 2003/0111690 A1 · Semiconductor device and method of manufacturing the same

Abstract

An aspect of the present invention includes: a gate insulating layer formed on an n-type silicon semiconductor region; a gate electrode formed on the gate insulating layer; a channel region formed immediately below the gate electrode in the semiconductor region; p-type source/drain regions formed at both sides of the channel region in the semiconductor region; p-type diffusion layer regions formed between the channel region and the source/drain regions in the semiconductor region and having a lower impurity concentration than the source/drain regions; first impurity regions formed near surface portions of the diffusion layer regions; and second impurity regions formed in part of the p-type diffusion layer regions and near surface portions of the source/drain regions, the second impurity regions being deeper than the first impurity regions, the first and second impurity regions containing one element selected from germanium, silicon, gallium, and indium as impurity.

Claims10

Dependent claims

A semiconductor device comprising:

a gate insulating layer formed on an n-type silicon semiconductor region;
a gate electrode formed on said gate insulating layer;
a channel region formed immediately below said gate electrode in the semiconductor region;
p-type source/drain regions formed at both sides of said channel region in the semiconductor region;
p-type diffusion layer regions formed between said channel region and said source/drain regions in the semiconductor region and having a lower impurity concentration than said source/drain regions;
first impurity regions formed near surface portions of said diffusion layer regions;
and
second impurity regions formed in part of said p-type diffusion layer regions and near surface portions of said source/drain regions, said second impurity regions being deeper than said first impurity regions,
said first and second impurity regions containing one element selected from germanium, silicon, gallium, and indium as impurity.

6 more elements

A method of manufacturing a semiconductor device comprising:

forming a gate electrode via a gate insulating layer on an n-type silicon semiconductor region;
forming a first gate sidewall of an insulating material at a side portion of said gate electrode;
forming first impurity regions including an amorphous layer at both sides of said first gate sidewall in said semiconductor region through ion-implantation of one element selected from germanium, silicon, gallium, and indium into said semiconductor region using said gate electrode and said first gate sidewall as masks;
and
after removing said first gate sidewall, forming second impurity regions including an amorphous layer shallower than the amorphous layer of said first impurity regions through ion-implantation of said one element into said semiconductor region using said gate electrode as a mask.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor device and method of manufacturing the same

Life of this patent

Semiconductor device and method of manufacturing the same

Life of this patent

Abstract

Claims10