Filtered mask enclosure
AssigneeIntel Corporation
InventorsHan-Ming Wu, Giang Dao
Life of this patent
Estimating the term…
Abstract
The present invention includes a filtered mask enclosure having an exterior portion and interior regions within the exterior portion such that the interior regions have a filtering region and a purging region connected to the filtering region. The present invention further includes a method of removing a first contaminant in a gas phase, a second contaminant in a solid phase, and a third contaminant having an electrical charge from a purge gas and flowing the purge gas through a vicinity of a mask while exposing a wafer with light through the mask.
Claims19
An apparatus comprising:
- an exterior portion;
- interior regions within said exterior portion, said interior regions comprising:
- a filtering region;
- and
- a purging region connected to said filtering region.
A method comprising:
- preconditioning a purge gas, said purge gas comprising:
- a first contaminant, said first contaminant being in a gas phase,
- a second contaminant, said second contaminant being in a solid phase, and
- a third contaminant, said third contaminant having an electrical charge;
- removing said first contaminant from said purge gas;
- removing said second contaminant from said purge gas;
- removing said third contaminant from said purge gas;
- flowing said purge gas through a vicinity of a mask;
- and
- exposing a wafer with light through said mask.
A filtered mask enclosure comprising:
- a gas purifier;
- a particulate filter disposed adjacent to said gas purifier;
- an electrostatic filter disposed adjacent to said particulate filter;
- and
- a purging region disposed adjacent to said electrostatic filter.
Dependencies are inferred from the claim text.