Hole grid array package and socket technology
AssigneeIntel Corporation
InventorBrent S. Stone
Life of this patent
Estimating the term…
Abstract
A chip interface assembly and method of assembling a chip interface provide enhanced performance. The chip interface assembly includes a semiconductor package and a socket. The semiconductor package has a female contact architecture, where the female contact architecture is mated with a male contact architecture of the socket. By reversing the traditional male/female arrangement of conventional interconnection interfaces, difficulties associated with signaling throughput, clearance, hardware complexity and electrical losses can be obviated.
Claims30
A chip interface assembly comprising:
- a semiconductor package;
- a socket;
- and
- said semiconductor package having a female contact architecture, the female contact architecture being mated with a male contact architecture of the socket.
A semiconductor package comprising:
- a substrate having a socket interface surface;
- surfaces defining a hole grid array (HGA) in the socket interface surface;
- and
- an electrically conductive material coupled to the surfaces defining the HGA such that the electrically conductive material enables electrical connection between a socket side of the substrate and one or more integrated circuit (IC) layers of the substrate.
A socket comprising:
- a base;
- and
- a plurality of contacts disposed within the base;
- said contacts having first ends extending beyond a package interface surface of the base such that the contacts enable the socket to be mated with a female contact architecture of a semiconductor package.
A chip interface assembly comprising:
- a substrate having a socket interface surface;
- surfaces defining a hole grid array (HGA) in the socket interface surface;
- an electrically conductive material coupled to the surfaces defining the HGA such that the electrically conductive material enables electrical connection between a socket side of the substrate and one or more integrated circuit (IC) layers of the substrate;
- said electrically conductive material including metal plating;
- a base;
- and
- a plurality of contacts disposed within the base;
- said contacts having first ends extending beyond a package interface surface of the base and second ends coupled to a printed circuit board (PCB);
- said first ends of the contacts having a curvature such that the curvature results in a spring force when the socket is mated with the HGA.
A method of assembling a chip interface, the method comprising:
- providing a semiconductor package having a female contact architecture;
- positioning a male contact architecture of a socket within the female contact architecture;
- and
- manipulating an actuation mechanism in a first direction such that manipulation of the actuation mechanism causes an outer body to force the female contact architecture into engagement with the male contact architecture.
Dependencies are inferred from the claim text.