Schmitt trigger circuit consuming low power
OwnerShinichi Hiroseinventor
Life of this patent
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Abstract
A Schmitt trigger circuit includes: an NAND gate receiving a control signal and an input signal; an inverter outputting an inverted signal of an output signal of the NAND gate; first and second P channel MOS transistors and first and second N channel MOS transistors switching a threshold potential of the Schmitt trigger circuit in response to an output signal of the inverter; and a third N channel MOS transistor receiving the control signal at a gate thereof. When the control signal attains L level, the third N channel MOS transistor is rendered non-conductive. Therefore, a through current does not flow through the first-third N channel MOS transistors. Thus, Schmitt width can be freely designed and power consumption will be small.
Claims9
A Schmitt trigger circuit setting an output signal to a second potential in response to an input signal having exceeded a first threshold potential when said output signal is at a first potential, and setting said output signal to said first potential in response to said input signal having exceeded a second threshold potential when said output signal is at said second potential, comprising:
- a logic circuit outputting an inverted signal of an input signal of said Schmitt trigger circuit to a prescribed node in response to a control signal having attained an active level, and providing said first potential to said prescribed node in response to said control signal having attained an inactive level;
- an inverting circuit outputting an inverted signal of a signal appearing at said prescribed node, as an output signal of said Schmitt trigger circuit;
- a first transistor of a first conductivity type and a second transistor of a second conductivity type, receiving an input signal of said Schmitt trigger circuit at respective input electrodes;
- a switching element rendered non-conductive in response to said control signal having attained the inactive level;
- and
- a switching circuit switching between said first and second threshold potentials by connecting said first transistor between a line of said first potential and said prescribed node in response to an output signal of said inverting circuit set to said second potential and by serially connecting said second transistor and said switching element between a line of said second potential and said prescribed node in response to an output signal of said inverting circuit set to said first potential.
A Schmitt trigger circuit setting an output signal to a second potential in response to an input signal having exceeded a first threshold potential when said output signal is at a first potential, and setting said output signal to said first potential in response to said input signal having exceeded a second threshold potential when said output signal is at said second potential, comprising:
- a first logic circuit outputting an inverted signal of an input signal of said Schmitt trigger circuit to a prescribed node in response to a control signal having attained an active level, and providing said first potential to said prescribed node in response to said control signal having attained an inactive level;
- a second logic circuit outputting an inverted signal of a signal appearing at said prescribed node, as an output signal of said Schmitt trigger circuit in response to said control signal having attained an active level, and outputting said second potential in response to said control signal having attained the inactive level;
- a first transistor of a first conductivity type and a second transistor of a second conductivity type, receiving at input electrodes an input signal of said Schmitt trigger circuit;
- and
- a switching circuit switching between said first and second threshold potentials by connecting said first transistor between a line of said first potential and said prescribed node in response to an output signal of said second logic circuit set to said second potential and by connecting said second transistor between a line of said second potential and said prescribed node in response to an output signal of said second logic circuit set to said first potential.
Dependencies are inferred from the claim text.