Method of forming stacked gate for flash memories

Abstract

The method of the present invention includes the steps of forming doped regions in the semiconductor substrate. A pad oxide layer is formed on the semiconductor substrate. A masking layer is formed on the pad oxide. A masking layer, the pad layer and the semiconductor substrate are patterned to form a trench therein. A gap-filling material is refilled into the trench and over the semiconductor substrate. A portion of the gap-filling material is removed to upper surface of the masking layer. Next step is to remove the masking layer. A first conductive layer is formed along the surface of the substrate, then removing a portion of the first conductive layer to expose an upper surface of the gap-filling material. A dielectric layer is formed on the first conductive layer and a second conductive layer is formed on the tunneling dielectric layer.

Dependencies are inferred from the claim text.