US 2003/0072201 A1 · Semiconductor memory device having bit line kicker

Abstract

A plurality of cell arrays is provided with a plurality of word lines and bit line pairs. A plurality of sense amplifiers is connected so as to each of the plurality of bit line pairs. The plurality of sense amplifiers configures a memory core section together with the plurality of cell arrays. A pair of bit line kicker drive lines is arranged in the vicinity of the plurality of cell arrays, and a pair of bit line kickers is connected between the pair of bit line kicker drive lines and each of the plurality of bit line pairs. In the memory core section, a pair of drivers is arranged so as to correspond to each cell array, and each of the pair of drivers has an output node connected to the pair of bit line kicker drive lines. The pair of drivers drives the pair of bit line kicker drive lines so as to change a potential of one bit line of one of the plurality of bit line pairs via the pair of bit line kickers.

Claims41

Dependent claims

A semiconductor memory device having a bit line kicker, comprising:

a plurality of cell arrays in which a plurality of memory cells and a plurality of word lines and bit line pairs for selecting the plurality of memory cells are arranged;
a plurality of sense amplifiers connected so as to correspond to the plurality of bit line pairs, and configuring a memory core section together with the plurality of cell arrays;
a pair of bit line kicker drive lines arranged in the vicinity of the plurality of cell arrays;
a pair of bit line kickers connected between the pair of bit line kicker drive lines and each of the plurality of bit line pairs;
and
a pair of drivers arranged so as to correspond to each cell array in the memory core section, having each output node connected to the pair of bit line kicker drive lines, and driving the pair of bit line kicker drive lines so as to change a potential of one bit line of one of the plurality of bit line pairs via the pair of bit line kickers.

3 more elements

A semiconductor memory device having a bit line kicker, comprising:

a plurality of sub-arrays provided with a plurality of word lines and bit line pairs and a plurality of memory cells selected by the plurality of word lines and bit line pairs, and arrayed in a matrix fashion;
a main word drive line driver circuit arranged in common to the plurality of sub-arrays, that is, a plurality of sub-arrays arranged in the same column;
a sub-word drive line driver circuit provided so as to correspond to each of the plurality of sub-arrays, and receiving an output from the main word drive line driver circuit;
a plurality of row decoder regions arranged between the plurality of sub-arrays arranged in the same column, and provided with a plurality of row decoders for driving the plurality of word lines of the plurality of sub-arrays, that is, the corresponding sub-array;
a plurality of sense amplifier regions arranged between the plurality of sub-arrays arranged in the same row, and provided with a plurality of sense amplifiers connected to the plurality of bit line pairs of the plurality of sub-arrays, that is, the corresponding sub-array;
a pair of bit line kicker drive lines arranged so as to pass through the plurality of sense amplifier regions, and provided so as to correspond to the plurality of sub-arrays arranged in the same column;
a pair of bit line kickers provided for each of the plurality of sub-arrays, and connected between the pair of bit line kicker drive lines and each of the plurality of bit line pairs;
and
at least one driver provided so as to correspond to each of the plurality of sub-arrays, arranged in each sub-cross region positioned between two adjacent row decoder regions of the plurality of row decoder regions and between two adjacent sense amplifier regions of the plurality of sense amplifier regions, having each output node connected to the pair of bit line kicker drive lines, and driving the pair of bit line kicker drive lines so as to change a potential of one bit line of one of the plurality of bit line pairs.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device having bit line kicker

Life of this patent

Semiconductor memory device having bit line kicker

Life of this patent

Abstract

Claims41