Non-volatile semiconductor memory device
AssigneeSeiko Espon Corporation
InventorTeruhiko Kamei
Life of this patent
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Abstract
A non-volatile semiconductor memory device has a memory cell array region in which a plurality of memory cells are disposed in both column and row directions, each of the memory cells having first and second MONOS memory cells controlled by a word gate and control gates. The memory cell array region is divided in the row direction into a plurality of sector regions extending longitudinally in the column direction. Each of the sector regions is divided into a plurality of large blocks, such as eight large blocks. There are eight control gate drivers for each sector region. Each of these eight control gate drivers sets potentials for first and second control gates of all the memory cells disposed within the corresponding one block of the eight large blocks.
Claims16
A non-volatile semiconductor memory device comprising:
- a memory cell array region in which are disposed a plurality of memory cells in both a column direction and a row direction, each of the memory cells having first and second non-volatile memory elements that are controlled by one word gate and first and second control gates;
- and
- a control gate drive section which drives the first and second control gates of the memory cells within the memory cell array region,
- wherein the memory cell array region is divided in the row direction into a plurality of sector regions;
- wherein each of the sector regions is divided into a plurality of blocks in the column direction;
- and
- wherein the control gate drive section has a plurality of control gate drivers for each of the sector regions, and each of the control gate drivers is disposed to correspond to at least one block of the plurality of blocks, to set the potentials of the first and second control gates of all the memory cells within the corresponding block.
Dependencies are inferred from the claim text.