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US 2003/0071663 A1Published application
Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation
AssigneeFujitsu Limited
InventorsMasao Taguchi, Satoshi Eto, Yoshihiro Takemae, Hiroshi Yoshioka, Makoto Koga
Life of this patent
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Abstract
A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By the constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.
Claims33
A semiconductor integrated circuit comprising:
- switch means for controlling the supply of a power source voltage to a signal amplification circuit receiving an input signal;
- and
- control means for selectively turning ON and OFF said switch means in accordance with the amplitude or frequency of said input signal.
A semiconductor integrated circuit comprising:
- a pair of differential transistors for applying an input signal changing at a first frequency or at a second frequency lower than said first frequency to one of the control electrodes, and applying a reference voltage substantially corresponding to an intermediate value of a logical amplitude of said input signal to the other of said control electrodes;
- a low potential side transistor interposed between a pair of said differential transistors and a low potential side power source;
- a high potential side transistor interposed between said differential transistor and an active load or between said active load and a high potential side power source;
- first control voltage generation means for generating a control voltage which turns ON both of said low potential side transistor and said high potential side transistor irrespective of the logical state of said input signal when the frequency of said input signal exists near said first frequency;
- and
- second control voltage generation means for generating a control voltage which turns ON one of said low potential side transistor and said high potential side transistor in accordance with the logical state of said input signal when the frequency of said input signal exists near said second frequency.
3 more elements
A semiconductor integrated circuit comprising:
- a comparator circuit for detecting high and low levels of an input voltage with reference to a reference voltage;
- and
- an input circuit including first and second transistors for controlling a power source current to said comparator circuit, interposed between first and second power sources and said comparator circuit, respectively, wherein an input signal applied to said comparator circuit is also applied to said first and second transistors.
A semiconductor integrated circuit comprising:
- a pair of differential transistors for applying an input signal having a first logical amplitude or a second logical amplitude greater than said first logical amplitude to one of the control electrodes, and applying a reference voltage substantially corresponding to an intermediate value of the logical amplitude of said input signal to the other of said control electrodes;
- a low potential side transistor interposed between a pair of said differential transistors and a low potential side power source;
- a high potential side transistor interposed between said differential transistors and an active load or between said active load and a high potential side power source;
- and
- said input signal being applied to the control electrode of each of said low potential side transistor and said high potential side transistor.
2 more elements
A semiconductor integrated circuit comprising:
- a transmission line for transmitting an input signal;
- a voltage source for generating a voltage substantially corresponding to an intermediate value of a logical amplitude of said input signal;
- a terminal resistor interposed between said transmission line and said voltage source through predetermined switching means;
- and
- ON/OFF control means for turning ON said switching means when the frequency of said input signal corresponds to said first frequency, and turning OFF said switching means when the frequency of said input signal corresponds to said second frequency.
2 more elements
A semiconductor integrated circuit including:
- a first PMOS transistor and a first NMOS transistor, connected in series between a high potential side power source and a low potential side power source;
- a second PMOS transistor and a second NMOS transistor, connected in series between said high potential side power source and said low potential side power source;
- and
- ON/OFF control means for selectively turning ON and OFF said four transistors in accordance with a signal logic from a chip internal circuit;
- wherein a junction between said first PMOS transistor and said first NMOS transistor as well as a junction between said second PMOS transistor and said second NMOS transistor are connected to a signal line outside the chip, and said signal line is connected to either said high potential side power source or said low potential side power source by the selective ON/OFF operation of said four transistors;
- said semiconductor integrated circuit comprising:
- mode control means for executing control in such a manner that when a mode designation signal represents a first transfer mode in which a terminal resistor is connected and used between said signal line and a predetermined constant voltage, said first PMOS transistor or said NMOS transistor drives said signal line, and when said mode designation signal represents a second transfer mode in which said terminal resistor is not connected, said second PMOS transistor or said second NMOS transistor drives said signal line;
- and
- the ON resistance of said first PMOS transistor and said first NMOS transistor being set on the basis of a signal amplitude on said signal line during said first transfer mode and a value of said terminal resistor, and the ON resistance of said second PMOS transistor and said second NMOS transistor being set on the basis of the signal amplitude on said signal line during said second transfer mode.
6 more elements
A semiconductor integrated circuit comprising differential transistors for outputting a signal corresponding to a difference between an input signal having a very small amplitude and a reference potential corresponding to an intermediate amplitude value of said input signal, wherein the threshold values of said differential transistors are mutually different.
A semiconductor integrated circuit comprising:
- a PMOS transistor and an NMOS transistor connected in series between a high potential side power source and a low potential side power source;
- an output terminal taken out from the junction between both of said transistors;
- first means for causing a push-pull operation of said PMOS transistor and said NMOS transistor in accordance with a logic of a signal to be outputted;
- and
- second means for cutting off said PMOS transistor in response to a predetermined level designation signal.
2 more elements
A semiconductor integrated circuit comprising:
- a differential gate for comparing a potential of an input signal with a predetermined reference potential and discriminating the logic of said input signal;
- selection means for selecting either one of a first reference potential given from outside a chip and a second reference potential generated by reference potential generation means inside the chip;
- and
- instruction means for instructing siad selection means to select said first reference potential when said first reference potential is given, and instructing said selection means to select said second reference potential when said first reference potential is not given.
1 more element
A semiconductor integrated circuit comprising:
- a logic gate for discriminating a logic of an input signal by comparing said input signal with a predetermined input threshold value;
- a differential gate for discriminating a logic of said input signal by comparing said input signal with a reference potential given outside the chip;
- selection means for selecting either one of the output of said logic gate and the output of said differential gate;
- and
- instruction mean for instructing said selection means to select the output of said differential gate when said reference potential is given, and instructing said selection means to select the output of said logic gate when said reference potential is not given.
2 more elements
A semiconductor integrated circuit comprising:
- an output circuit for providing a first output voltage for determining an H level to a predetermined reference voltage, and a second output voltage for determining an L level;
- and
- means for controlling said first and second output voltages under a substantial non-load state to voltage levels having absolute values smaller than the absolute values of voltages corresponding to power sources, respectively.
Dependencies are inferred from the claim text.