Method for forming patterns for semiconductor devices

A method for forming an electrically conductive layer having patterns for semiconductor devices, comprising the steps of:

• providing a substrate;
• forming an insulation layer on the substrate, the insulation layer having predetermined functional groups;
• forming a patterned polymer layer having the patterns on the insulation layer, the patterned polymer layer having a coupling agent;
• etching the insulation layer in accordance with the patterns of the patterned polymer layer to create a patterned insulation layer;
• stripping the patterned polymer layer to expose the patterned insulation layer;
• treating the patterned insulation layer with a catalyst-containing solution;
• and
• depositing electrically conductive material on the patterned insulation layer.

A semiconductor device comprising:

• a substrate;
• a patterned insulation layer formed on the substrate, the patterned insulation layer having predetermined patterns;
• and
• a plating layer formed on the patterned insulation layer, the plating layer having electrically conductive patterns corresponding to the predetermined patterns of the patterned insulation layer,
• wherein the patterned insulation layer has catalytically active surfaces, and the electrically conductive patterns are formed by depositing electrically conductive material on the catalytically active surfaces of the patterned insulation layer.