Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process

A metal-oxide-semiconductor field-effect transistor (MOSFET) circuit comprising:

• a first circuit implemented using current-controlled complementary metal-oxide semiconductor (C3MOS) logic wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals, the first circuit receiving a first power supply voltage;
• a second circuit coupled to the first circuit and implemented using conventional complementary metal-oxide-semiconductor (CMOS) logic wherein substantially zero static current is dissipated, the second circuit receiving a second power supply voltage that is lower in magnitude than the first power supply voltage;
• and
• a third circuit coupled to the second circuit and implemented using C3MOS logic, the third circuit receiving the first power supply voltage.

A method for processing high speed signals using silicon complementary metal-oxide-semiconductor (CMOS) technology, the method comprising:

• receiving the high speed signal at a first circuit that uses current-controlled complementary metal-oxide semiconductor (C3MOS) logic wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals;
• powering the first circuit using a first power supply voltage;
• converting the high speed signal into a lower frequency signal;
• processing the lower frequency signal by a second circuit that uses standard CMOS logic wherein substantially zero static current is dissipated;
• and
• powering the second circuit using a second power supply voltage that is smaller in magnitude than the first power supply voltage.