US 2002/0186153 A1 · Modulation method, modulation apparatus, demodulation method, demodulation apparatus, information recording medium, information transmission method, and information transmission apparatus

Abstract

There is disclosed a modulation method in which a four bits unit of a plurality of continuous input data words is encoded into a six bits unit of a plurality of continuous output code words by referring to a plurality of coding tables including output code words corresponding to input data words, and coding table designation information in which an coding table for use in encoding the next input data word is designated. Further, in particular, two redundant bits are inserted into each predetermined number of data words of the plurality of continuous output code words. Even with such redundant bits, a DSV control is possible, k satisfies 9 in a (1, k) RLL rule, and a repetition frequency of a minimum run is limited.

Claims15

Dependent claims

A modulation method comprising:

referring to a plurality of coding tables including output code words corresponding to input data words, and coding table designation information in which an coding table for use in encoding a next input data word is designated, to thereby encode a four bits unit of a plurality of continuous input data words into a six bits unit of a plurality of continuous output code words;
and
inserting two redundant bits into each predetermined number of data words of said plurality of continuous output code words, so that a digital sum variation (DSV) control is possible, k satisfies 9 in a (1, k) run length limited (RLL) rule, and a successive repetition frequency of a minimum run is limited.

A modulation apparatus comprising:

a plurality of coding tables including output code words corresponding to input data words, and coding table designation information in which an coding table for use in encoding a next input data word is designated;
encoding means for referring to said plurality of coding tables, and thereby encoding a four bits unit of a plurality of continuous input data words into a six bits unit of a plurality of continuous output code words;
and
redundant bits inserting means for inserting two redundant bits into each predetermined number of data words of said plurality of continuous output code words, so that a digital sum variation (DSV) control is possible, k satisfies 9 in a (1, k) run length limited (RLL) rule, and the number of successive repetitions of a minimum run is limited.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

10/160,023Filed 4 Jun 2002

Priority

JP P2001-1731607 Jun 2001

Published

12 Dec 2002

Term ends

Not estimatedThe source records don’t support an estimate.

Classification9 codes

H03M 5/145
Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation…:…
G11B 20/1426
Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code: conversion to or from block codes or…
H03M 7/46
Compression ; Expansion; Suppression of unnecessary data, e.g. redundancy reduction: conversion to or from run-length codes, i.e. by representing…
G11B 2020/1282
Servo information: in embedded servo fields

Modulation method, modulation apparatus, demodulation method, demodulation apparatus, information recording medium, information transmission method, and information transmission apparatus

Life of this patent

Modulation method, modulation apparatus, demodulation method, demodulation apparatus, information recording medium, information transmission method, and information transmission apparatus

Life of this patent

Abstract

Claims15