Optimized configurable scheme for demand based resource sharing of request queues in a cache controller
AssigneeIntel Corporation
InventorsSalvador Palanca, Lokpraveen B. Mosur
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsSalvador Palanca, Lokpraveen B. Mosur
Estimating the term…
A cache controller is presented having at least one register. The cache controller is connected to a cache memory, which is connected to the register. The cache controller dynamically selects between a cache management scheme based on a maximum number of programmable writeback entries and a cache management scheme allowing both writeback entries and incoming core requests to be allocated based on priority. Also presented is a device having a single request queue and a corresponding single set of buffers. The device dynamically selects between a cache management scheme based on a maximum number of programmable writeback entries and a cache management scheme allowing both writeback entries and incoming core requests to be allocated based on priority.
A method comprising
A computer system comprising:
A computer system comprising:
A cache controller comprising;
An apparatus comprising;
Dependencies are inferred from the claim text.