Floating point status information testing circuit

A floating point operand testing circuit for identifying a status of a floating point operand, comprising:

• an analysis circuit configured to determine the status of the floating point operand based only on the contents of the floating point operand;
• an operand buffer coupled to the analysis circuit and configured to store the floating point operand encoded with the status;
• and
• a result generator circuit coupled to the analysis circuit and being responsive to at least one control signal, the result generator providing a result signal indicative of whether the status of the floating point operand conforms to a predetermined format associated with the at least one control signal.

A method for testing a floating point status condition of a floating point operand, comprising:

• (a) receiving the floating point operand related to a floating point instruction;
• (b) determining the floating point status of the operand from only the contents of the floating point operand;
• (c) receiving at least one control signal;
• and
• (d) generating a result signal to indicate whether the status of the floating point operand conforms to a predetermined format associated with the at least one control signal.

A computer-readable medium on which is stored a set of instructions for testing a floating point status condition of a floating point operand, which when executed perform steps comprising:

• (a) receiving the floating point operand;
• (b) determining the floating point status of the operand from only the contents of the floating point operand;
• (c) receiving at least one control signal;
• and
• (d) generating a result signal to indicate whether the status of the floating point operand conforms to a predetermined format associated with the at least one control signal.