US 2002/0177327 A1 · Method for forming a gate dielectric layer by a single wafer process

Abstract

A method for forming a gate dielectric layer by a single wafer process is provided. The method for forming a gate dielectric layer by a single wafer process is accomplished by two steps respectively performed in a single-wafer chamber and a single-wafer rapid thermal processing (RTP) chamber. First, by placing a silicon wafer in the single-wafer chamber and performing a nitridation process to form a nitrogen-contained silicon oxide layer on the surface of the silicon wafer. Then, placing the silicon wafer in the single-wafer RTP chamber and performing an in-situ steam generation (ISSG) oxidation process to oxidize the nitrogen-contained silicon oxide layer to a silicon oxide layer with an oxynitride bottom layer serving for a gate dielectric layer.

Claims20

Dependent claims

A method for forming a gate dielectric layer by a single wafer process, comprising:

providing a single silicon wafer with a first conductive type;
forming a plurality of isolation regions in said silicon wafer;
forming a well region with a second conductive type opposite to said first conductive type in a top portion of said silicon wafer between a pair of said isolation regions;
placing said silicon wafer in a single-wafer chamber to perform a nitridation process to form a nitrogen-contained silicon oxide layer on the surface of said well region;
and
placing said silicon wafer in a single-wafer rapid thermal processing chamber to perform an in-situ steam generation (ISSG) oxidation process to oxidize said nitrogen-contained silicon oxide layer to a silicon oxide layer with an oxynitride bottom layer serving for a gate dielectric layer.

3 more elements

Dependencies are inferred from the claim text.

Method for forming a gate dielectric layer by a single wafer process

Life of this patent

Method for forming a gate dielectric layer by a single wafer process

Life of this patent

Abstract

Claims20