Resist mask for measuring the accuracy of overlaid layers
AssigneeOki Electric Industry Co., Ltd.
InventorsAkiyuki Minami, Satoshi Machida
Life of this patent
Estimating the term…
Abstract
A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.
Claims19
A resist mark for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer, comprising:
- a first measurement mark having a first opening, formed on the substrate;
- an intermediate layer formed on the first measurement mark and in the first opening;
- a frame-shaped second measurement mark formed on the intermediate layer;
- a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer;
- and
- wherein the second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.
A resist mark as claimed in claim 11, wherein the second measurement mark has a width in the range 0.3-1.0 μm.
A method for manufacturing a semiconductor wafer having a resist mark for measuring the accuracy of overlay of a photomask disposed on the semiconductor wafer, comprising:
- forming a first layer on the semiconductor wafer;
- forming a first rectangularly shaped opening in the first layer to make a first measurement mark;
- forming an intermediate layer on the first measurement mark and in the first opening;
- forming a second layer on the intermediate layer;
- forming a second measurement mark and a third measurement mark by forming a second rectangularly shaped opening and a frame-shaped opening in the second layer, the second rectangularly shaped opening being located above the first opening, the second measurement mark being isolated form the third measurement mark by the frame-shaped opening;
- wherein the second measurement mark is formed in a frame-shaped;
- and
- wherein the second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.
A method for manufacturing a semiconductor wafer having a resist mark for measuring the accuracy of overlay of a photomask disposed on the semiconductor wafer, comprising:
- forming a first layer on the semiconductor wafer;
- forming a first rectangularly shaped opening in the first layer to make a first measurement mark;
- forming an intermediate layer on the first measurement mark and in the first opening;
- forming a second layer on the intermediate layer;
- forming a second measurement mark and a third measurement mark by forming a second rectangularly shaped opening and four openings in the second layer, the second rectangularly shaped opening being located above the first opening, the second measurement mark being formed in a frame-shaped, the four openings being formed along by each side of the second measurement mark, and the second measurement mark being connected to the third measurement mark at its corners;
- and
- wherein the second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.
Dependencies are inferred from the claim text.