Semiconductor device and a method for forming a via hole in a semiconductor device
OwnerKazuyoshi Uenoinventor
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Abstract
In a method for forming a via hole of a semiconductor device, a first step via hole is formed in a SiO2 layer/etching-step layer/Cu layer laminate, this formation being stopped at the etching-stop layer, after which resist is peeled away, and a second step via hole continuous with the first step via hole is formed in the etching-stop layer. These via holes are patterned and a barrier film is formed thereonto using sputtering. By shortening the overetching time an increase in the electrical resistance of the Cu-Cu connection is suppressed, and current leakage is prevented.
Claims11
A semiconductor device which comprises;
- a substrate, on a main surface of which, interconnect layers made at least of copper are formed along with a predetermined pattern in buried condition;
- an etching-stop layer formed on said main surface of said substrate;
- and
- an insulation layer formed on said etching-stop layer,
- said semiconductor device further comprises a via-hole provided on a main surfacer of said insulation layer and penetrating through said insulation layer and said etching-stop layer so that a bottom of said via-hole reaches at a surface of said interconnect layer, and wherein a barrier layer continuously covering said main surface of said insulation layer, inside wall surface of said via-hole and surface of said interconnect layer integratedly.
A method for forming a via hole of a semiconductor device comprising:
- a step of forming a first step via hole in a laminated structure formed by a copper layer, an etching-stop layer formed on a surface of said copper layer, and an insulation layer formed on a surface of said etching-stop layer, thereby a bottom of said first step via hole is stopped at said etching-stop layer;
- a step of forming a second step via hole continuous with said first step via hole in said etching-stop layer, thereby a bottom of said second step via hole reaching at a surface of said interconnect layer;
- a step of cleaning said second step via hole;
- and
- a step, after said cleaning, of forming a barrier film on said first and second step via holes, by sputtering.
A method for forming a via hole of a semiconductor device according to claim2, wherein said step of cleaning said via hole comprises a step for annealing said via hole at a low oxygen partial pressure.
Dependencies are inferred from the claim text.