Capacitor for integration with copper damascene processes and a method of manufacture therefore
AssigneeLucent Technologies Inc.
InventorsStephen Downey, Edward Harris, Sailesh Merchant
Life of this patent
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AssigneeLucent Technologies Inc.
InventorsStephen Downey, Edward Harris, Sailesh Merchant
Estimating the term…
The present invention provides a capacitor for use in a semiconductor device having a damascene interconnect structure, such as a dual damascene interconnect, formed over a substrate of a semiconductor wafer. In one particularly advantageous embodiment, the capacitor, comprises a first capacitor electrode, such as copper, comprised of a portion of the damascene interconnect structure, an insulator layer formed on the damascene interconnect structure wherein the insulator layer is a passivation layer, such as silicon nitride. The passivation layer may be an outermost or final passivation layer, or it may be an interlevel passivation layer. The capacitor further includes a second capacitor electrode comprised of a conductive layer, such as aluminum, that is formed on at least a portion of the insulator layer.
For use in a semiconductor device having a damascene interconnect structure formed over a substrate of a semiconductor wafer, a capacitor, comprising:
A semiconductor device formed on a substrate of a semiconductor wafer, comprising:
A method of fabricating a capacitor for use in a semiconductor device having a damascene interconnect structure formed over a substrate of a semiconductor wafer, comprising:
Dependencies are inferred from the claim text.