Low resistance wiring in the periphery region of displays

A method for forming a display device, comprising the steps of:

• forming a gate metal, thin film transistors and a data metal in an array region of the display device wherein the gate metal and the data metal extend into a periphery region outside of the array region;
• depositing a planarizing layer over the array region and the periphery region;
• patterning vias into the planarizing layer in the array region and the periphery region to expose portions of at least one of the gate metal and the data metal;
• depositing a transparent conductor in the array region and the periphery region;
• locally depositing a metal layer over the transparent conductor in selected areas of the periphery region;
• patterning the metal layer using the transparent conductor as an etch stop to form at least one of additional wiring and connections between the gate metal and the data metal in the periphery region;
• and
• patterning the transparent conductor to form pixel electrodes in the array region.

A display device, comprising:

• an array region including pixel cells, the pixel cells including metal lines;
• a periphery region disposed outside of the array region, the periphery region including the metal lines which extend from the array region;
• and
• at least one connection between the metal lines in the periphery region, the at least one connection including a layered stack, the stack including a transparent conductor layer and an opaque metal layer.

A display device, comprising:

• an array region including pixel cells, the pixel cells including metal lines;
• a periphery region disposed outside of the array region, the periphery region including the metal lines which extend from the array region;
• and
• a wiring layer formed on the metal lines in the periphery region, the wiring layer including a layered stack, the stack including a transparent conductor layer and an opaque metal layer.