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AssigneeHitachi, Ltd.
InventorsHiroshi Akasaki, Shuichi Miyaoka, Yuji Yokoyama, Masatoshi Hasegawa, Kozaburo Kurita
Estimating the term…
In a semiconductor integrated circuit device that includes macro cells (circuit blocks that can be designed independently) such as a storage circuit and operates synchronously with an external clock, total delay time from signal input to output is reduced and the speed of operation is increased. In the semiconductor integrated circuit device which has plural circuit blocks coupled in series for signal transmission and whose whole operation is controlled by a clock signal, the semiconductor integrated circuit device including first circuit blocks that receive input signals in response to a first timing signal based on a clock signal, and a second circuit block that forms output signals in response to a second timing signal based on the clock signal, a time difference between the first timing signal and the second timing signal is set to a non-integral multiple of the cycle of the clock signal.
A semiconductor integrated circuit device which has plural circuit blocks coupled in series for signal transmission and whose whole operation is controlled by a clock signal,
A semiconductor integrated circuit device which has a signal input point, a signal output point, and plural circuit blocks provided in series between the signal input point and the signal output point and in which the timings of a signal input operation from the signal input point, a signal output operation at the signal output point, and a signal transmission operation among the plural circuit blocks are respectively controlled by timing signals,
A semiconductor integrated circuit device which has plural circuit blocks coupled in series for signal transmission and whose whole operation is controlled by a clock signal,
Dependencies are inferred from the claim text.