Method of erasing a FAMOS memory cell and a corresponding memory cell
AssigneeSTMicroelectronics S.r.l.
InventorsRichard Fournel, Cyrille Dray, Daniel Caspar
Life of this patent
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Abstract
A FAMOS memory cell is electrically erased. The FAMOS memory cell may be electrically erased by applying to the substrate a voltage having a value at least 4 volts higher than the lower of a voltage applied to the source and a voltage applied to the drain. The voltage applied to the substrate is also less than a predetermined limit above which the memory cell is destroyed.
Claims21
A method of erasing a FAMOS memory cell, characterized in that said memory cell (CM) is erased electrically.
A method according to any preceding claim, characterized in that the PMOS transistor of the memory cell has an annular configuration including an electrode (10) at the center surrounded by the gate (20) and a peripheral electrode (30).
A memory device including a FAMOS memory cell, characterized in that the memory cell (CM) is electrically erasable.
Dependencies are inferred from the claim text.