Method for forming variable-K gate dielectric

A method for forming a gate dielectric, comprising the steps of:

• a. forming a low-K dielectric layer over a semiconductor structure;
• b. forming a dummy dielectric layer over said low-K dielectric layer;
• c. patterning said dummy dielectric layer and low-K dielectric layer to form a first gate opening in said dummy dielectric layer and a second gate opening in said low-K dielectric layer;
• d. isotropically etching said dummy dielectric layer selectively to said low-K dielectric layer to open said first gate opening, forming a stepped gate opening;
• e. forming a high-K dielectric layer over said dummy dielectric and in said stepped gate opening;
• and
• f. forming a gate electrode on said high-K dielectric layer.