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OwnerNaoki Nishio, Hideyuki Fukuhara +2inventors
InventorsNaoki Nishio, Hideyuki Fukuhara, Yoichi Miyai, Yoshinobu Kagawa
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A semiconductor memory chip has fuses and a redundancy memory cell which can replace a normal memory cell that is found defective by cutting off the fuses. If the normal memory cell is defective, the fuses are cut off thereby to connect the redundancy memory cell instead of the normal memory cell which is defective. The entire surface of the semiconductor memory chip is coated with a resist layer. The coated the resist layer is exposed at regions of the fuses to an energy beam, and then developed form a resist pattern. The semiconductor memory chip is etched at the regions using the resist pattern as a mask for thereby cutting off the fuses. The fuses may be spaced at intervals of 2 μm or smaller, and can be cut off without causing damage to a layer beneath the fuses.
A method of repairing a semiconductor memory in a semiconductor memory chip by cutting off interconnections if a normal memory cell is defective, thereby to connect a redundancy memory cell in the semiconductor memory chip instead of the normal memory cell which is defective, comprising the steps of:
A method of repairing a semiconductor memory in a semiconductor memory chip by forming an interconnection if a normal memory cell is defective, thereby to connect a redundancy memory cell in the semiconductor memory chip instead of the normal memory cell which is defective, comprising the steps of:
A method of repairing a semiconductor memory in a semiconductor memory chip by cutting off an interconnection and forming an interconnection if a normal memory cell is defective, thereby to connect a redundancy memory cell in the semiconductor memory chip instead of the normal memory cell which is defective, comprising the steps of:
Dependencies are inferred from the claim text.