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OwnerMisa Kasahara, Yoshihiro Ishida +2inventors
InventorsMISA KASAHARA, YOSHIHIRO ISHIDA, YUKIO FUJITA, NORIYOSHI KATO
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A counter counts the frame counts n of a video signal. A delay for generating a delayed video signal delayed by one frame. A motion detector detects a motion from the video and delayed video signals. A circular coefficient generator generates coefficients k and 1−k according to the detected motion. A first circuit generates a first circulation signal from the video signal according to n, k, and a pre-determined value N. A second circuit generates a second circulation signal from the delayed video signal according to k and n. A adder adds the first circulation signal to the second circulation signal. 0≦k≦1. In the first circuit, a first multiplier multiplies (1−k) by N which is a natural number more than one, a second multiplier multiplies an output of the first multiplier by the video signal, and a first switch outputs the video signal when n≦N and outputs an output of the second multiplier when n<N, to generate the first circulation signal. In the second circuit, a third multiplier multiplies the video signal by k, and a second switch outputs the video signal when n≦N, and outputs an output of the third multiplier when n<N, to generate the second circulation signal. A method and a storing medium storing¥ a video processing program are also disclosed.
A video signal processing apparatus comprising:
A video signal processing apparatus comprising:
A method of processing a video signal comprising the steps of:
A storing medium storing a program of processing a video signal comprising the steps of:
Dependencies are inferred from the claim text.