Method and apparatus for frame-based protocol processing
AssigneeIntel Corporation
InventorsOreste B. Varelas, Barry K. Tsuji
Life of this patent
Estimating the term…
Abstract
A method and apparatus for an overhead processing system is described. More particularly, frame latency is used to process less time-critical overhead with the overhead processing system. Such a system uses less semiconductor wafer area and consumes less power than processing all overhead in a time-critical manner using flip-flops and the like.
Claims33
A system for processing overhead information in a network, the system comprising:
- an overhead processor;
- an address generator in communication with the overhead processor;
- memory in communication with the overhead processor;
- control logic in communication with the overhead processor;
- and
- a transmit and receive module in communication with the overhead processor.
An apparatus for a drop side of a transmit or a receive module, comprising:
- a descrambler configured to receive a data signal and partition out a first portion of overhead information and a payload envelope therefrom, the payload envelope comprising a second portion of overhead information and data;
- a first timing control coupled to the descrambler and configured to provide a first timing signal;
- a first submodule comprising a first overhead extractor, a first overhead event generator and a first checker, the first submodule coupled to the first timing control and the descrambler, the first submodule configured to receive the first portion of overhead information, to generate check first check values for checking a portion of the first portion of overhead information received and to generate a first event signal indicating receipt of the first portion of overhead information;
- a pointer interpreter coupled to the first timing control and the descrambler;
- a buffer memory coupled to the first timing control and the descrambler to receive the payload envelope;
- a second timing control coupled to the buffer memory and configured to provide a second timing signal;
- and
- a second submodule comprising a second overhead extractor, a second overhead event generator and a second checker, the second submodule coupled to the buffer memory and to the second timing control, the second submodule configured to receive the second portion of overhead information, to generate second check values for checking a portion of the second portion of overhead information received and to generate a second event signal indicating the second portion of overhead information has been received.
An apparatus for an add side of a transmit or a receive module, comprising:
- timing control;
- an elastic store coupled to the timing control;
- a pointer generator coupled to the elastic store and to the timing control;
- a submodule coupled to the pointer generator and to the timing control, the submodule comprising an overhead substitute, an overhead event generator, an alarm indication signal generator and a checker, the submodule is configured to insert generated overhead for an output stream, to generate an alarm signal, to calculate and insert parity bits in the output stream, and to generate an event signal to indicate the output stream has been transmitted;
- and
- a scrambler coupled to the submodule, the elastic store and to the timing control, the scrambler is configured to receive the output stream, a payload evelope and a frame-based timing signal to provide a frame-synchronized data signal, the frame-synchronized data signal comprising data and overhead.
A method for scheduling overhead to be processed, comprising:
- providing an overhead processing system;
- programming the overhead processing system to,
- initialize values;
- check an event queue;
- if there is an event in the event queue, determining event type;
- and
- if the event type is for selected rows of overhead, processing information for the selected rows of overhead.
Dependencies are inferred from the claim text.