Circuit for protecting synchronizing patterns

A circuit for protecting synchronizing patterns, which is applied to an optical disc read/write device, the circuit comprising:

• a detector for receiving an EFM signal and detecting the EFM signal and outputting an indicative signal (SYNCFOUND) using an clock (PLCK) outputted from a PLL device;
• a frame period counter for counting pulses of each period of the indicative signal (SYNCFOUND) by using a reference clock with constant frequency and outputting a frame period count;
• a first judgment unit for judging whether the frame period count is normal and outputting an first judgment signal (UPDATE) when said frame period count is judged as normal;
• a memory unit for storing the frame period count and updating the stored frame period count based on the first judgment signal (UPDATE);
• a window generator for outputting a searching range signal by seeking a third judgment signal (INSYNC) based on the frame period count stored in the memory unit;
• a second judgment unit for judging whether the indicative signal (SYNCFOUND) is correct based on the searching range signal and outputting an second judgment signal (REALSYNC);
• a third judgment unit for judging whether the frame period count is normal based on the second judgment signal (REALSYNC) and outputting the third judgment signal (INSYNC) to the window generator;
• a signal generator for generating a synchronization signal (FRAMESYNC) based on the frame period count stored in the memory unit and said second judgment signal (REALSYNC).